TY - JOUR
T1 - III-V-on-Si Photonic Crystal Nanocavity Laser Technology for Optical Static Random Access Memories
AU - Alexoudi, Theonitsa
AU - Fitsios, Dimitrios
AU - Bazin, Alexandre
AU - Monnier, Paul
AU - Raj, Rama
AU - Miliou, Amalia
AU - Kanellos, George T.
AU - Pleros, Nikos
AU - Raineri, Fabrice
PY - 2016/11/1
Y1 - 2016/11/1
N2 - Heterogeneous integration of III-V semiconductors on silicon has gained considerable momentum fueled by the need to implement fully functional photonic devices and circuits in a CMOS compatible platform. In this communication, we report on a III-V photonic crystal (PhC) nanocavity, heterogeneously integrated on a silicon-on-insulator platform, to form a PhC nanocavity laser capable of exhibiting two elementary static random access memory (SRAM) cell functions individually, namely switching and latching operations under a high-speed, bit-level regime. As such, the PhC nanocavity laser is examined as a generic logic functions building block, suitable toward multiGb/s energy-efficient, optical SRAM cells with minimal device footprint. The proposed device occupies a total area of only 6.2 μm2, rendering in this way the demonstrated memory element the smallest among the integrated optical memories presented so far. Bit-level SRAM cell operation requires two elementary functions: the access gate (AG) switching function and set-reset flip-flop (SR-FF) latching function. At first, AG switching operation is evaluated through successful wavelength conversion at 10 Gb/s, revealing a power penalty of 1 dB at 10-9 BER and a switching energy of only 4.8 fJ/bit. Then, fully functional SR-FF memory operation is successfully demonstrated, exhibiting error-free operation with negative power penalty at 5 Gb/s and switching energies of 6.4 fJ/bit. FF operation at higher speeds of 10 Gb/s with reduced switching energy levels of 3.2 fJ/bit is also experimentally investigated. Both logic operations were demonstrated separately with the same PhC nanocavity laser device exhibiting <50 ps switching times and evaluated under real-type data traffic patterns, raising expectations for beyond 20 Gb/s capabilities toward implementing energy-efficient, ultracompact and high-speed true optical SRAM setups for Datacom applications.
AB - Heterogeneous integration of III-V semiconductors on silicon has gained considerable momentum fueled by the need to implement fully functional photonic devices and circuits in a CMOS compatible platform. In this communication, we report on a III-V photonic crystal (PhC) nanocavity, heterogeneously integrated on a silicon-on-insulator platform, to form a PhC nanocavity laser capable of exhibiting two elementary static random access memory (SRAM) cell functions individually, namely switching and latching operations under a high-speed, bit-level regime. As such, the PhC nanocavity laser is examined as a generic logic functions building block, suitable toward multiGb/s energy-efficient, optical SRAM cells with minimal device footprint. The proposed device occupies a total area of only 6.2 μm2, rendering in this way the demonstrated memory element the smallest among the integrated optical memories presented so far. Bit-level SRAM cell operation requires two elementary functions: the access gate (AG) switching function and set-reset flip-flop (SR-FF) latching function. At first, AG switching operation is evaluated through successful wavelength conversion at 10 Gb/s, revealing a power penalty of 1 dB at 10-9 BER and a switching energy of only 4.8 fJ/bit. Then, fully functional SR-FF memory operation is successfully demonstrated, exhibiting error-free operation with negative power penalty at 5 Gb/s and switching energies of 6.4 fJ/bit. FF operation at higher speeds of 10 Gb/s with reduced switching energy levels of 3.2 fJ/bit is also experimentally investigated. Both logic operations were demonstrated separately with the same PhC nanocavity laser device exhibiting <50 ps switching times and evaluated under real-type data traffic patterns, raising expectations for beyond 20 Gb/s capabilities toward implementing energy-efficient, ultracompact and high-speed true optical SRAM setups for Datacom applications.
KW - access gate
KW - Optical flip flop
KW - Optical memories
KW - photonic crystal nanocavity laser
KW - wavelength conversion
UR - http://www.scopus.com/inward/record.url?scp=84991088825&partnerID=8YFLogxK
U2 - 10.1109/JSTQE.2016.2593636
DO - 10.1109/JSTQE.2016.2593636
M3 - Article (Academic Journal)
AN - SCOPUS:84991088825
SN - 1077-260X
VL - 22
JO - IEEE Journal of Selected Topics in Quantum Electronics
JF - IEEE Journal of Selected Topics in Quantum Electronics
IS - 6
M1 - 7517367
ER -