Impact of Turn-Off Gate Voltage and Temperature on Threshold Voltage Instability in Pulsed Gate Voltage Stresses of SiC MOSFETs

Arkadeep Deb; Jose Ortiz-Gonzalez; Mohamed Taha; Saeed Jahdi; Phillip Mawby; Olayiwola Alatise

doi:10.4028/p-lidhbt

Impact of Turn-Off Gate Voltage and Temperature on Threshold Voltage Instability in Pulsed Gate Voltage Stresses of SiC MOSFETs

Arkadeep Deb, Jose Ortiz-Gonzalez, Mohamed Taha, Saeed Jahdi, Phillip Mawby, Olayiwola Alatise

Electrical Energy Management

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Abstract

Bias temperature instability (BTI) in SiC MOSFETs has come under significant academic and industrial research. Threshold voltage (VTH) shift due to gate voltage stress has been demonstrated in several studies investigating gate oxide reliability in SiC MOSFETs. Results have shown positive.VTH shift occurs due to electron trapping (PBTI), and negative VTH shift occurs due to hole trapping (NBTI). In this paper, VTH shift is studied for unipolar and bipolar gate pulses with frequencies ranging from 1Hz to 100 kHz. The turn-OFF voltage for the unipolar VGS pulse is 0 V. In the case of the bipolar VGS pulses, two turn-OFF voltages are investigated, namely VGS-OFF = -3V and VGS-OFF= -5V. VTH shift is measured after 1000 seconds with recovery times in the range of 20 milliseconds, and preconditioning is performed before VTH measurement. These measurements have been performed at 25°C and 150°C on a commercially available SiC Planar MOSFET and a SiC Trench MOSFET. The results show that -3 V is enough for de-trapping sufficient electrons while -5V results in increased NBTI, which is accelerated by higher temperatures.

Original language	English
Pages (from-to)	61-66
Number of pages	6
Journal	Materials Science Forum
Volume	1091
DOIs	https://doi.org/10.4028/p-lidhbt
Publication status	Published - 5 Jun 2023

Bibliographical note

Funding Information:
This work was supported by the UK Engineering and Physical Sciences Research Council (EPSRC) through the grant reference EP/R004366/1 and by Innovate UK through the APC-funded FutureBEV project with reference number 50140.

Publisher Copyright:
© 2023 The Author(s). Published by Trans Tech Publications Ltd, Switzerland

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title = "Impact of Turn-Off Gate Voltage and Temperature on Threshold Voltage Instability in Pulsed Gate Voltage Stresses of SiC MOSFETs",

abstract = "Bias temperature instability (BTI) in SiC MOSFETs has come under significant academic and industrial research. Threshold voltage (VTH) shift due to gate voltage stress has been demonstrated in several studies investigating gate oxide reliability in SiC MOSFETs. Results have shown positive.VTH shift occurs due to electron trapping (PBTI), and negative VTH shift occurs due to hole trapping (NBTI). In this paper, VTH shift is studied for unipolar and bipolar gate pulses with frequencies ranging from 1Hz to 100 kHz. The turn-OFF voltage for the unipolar VGS pulse is 0 V. In the case of the bipolar VGS pulses, two turn-OFF voltages are investigated, namely VGS-OFF = -3V and VGS-OFF= -5V. VTH shift is measured after 1000 seconds with recovery times in the range of 20 milliseconds, and preconditioning is performed before VTH measurement. These measurements have been performed at 25°C and 150°C on a commercially available SiC Planar MOSFET and a SiC Trench MOSFET. The results show that -3 V is enough for de-trapping sufficient electrons while -5V results in increased NBTI, which is accelerated by higher temperatures.",

author = "Arkadeep Deb and Jose Ortiz-Gonzalez and Mohamed Taha and Saeed Jahdi and Phillip Mawby and Olayiwola Alatise",

note = "Funding Information: This work was supported by the UK Engineering and Physical Sciences Research Council (EPSRC) through the grant reference EP/R004366/1 and by Innovate UK through the APC-funded FutureBEV project with reference number 50140. Publisher Copyright: {\textcopyright} 2023 The Author(s). Published by Trans Tech Publications Ltd, Switzerland",

year = "2023",

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doi = "10.4028/p-lidhbt",

language = "English",

volume = "1091",

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journal = "Materials Science Forum",

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T1 - Impact of Turn-Off Gate Voltage and Temperature on Threshold Voltage Instability in Pulsed Gate Voltage Stresses of SiC MOSFETs

AU - Deb, Arkadeep

AU - Ortiz-Gonzalez, Jose

AU - Taha, Mohamed

AU - Jahdi, Saeed

AU - Mawby, Phillip

AU - Alatise, Olayiwola

N1 - Funding Information: This work was supported by the UK Engineering and Physical Sciences Research Council (EPSRC) through the grant reference EP/R004366/1 and by Innovate UK through the APC-funded FutureBEV project with reference number 50140. Publisher Copyright: © 2023 The Author(s). Published by Trans Tech Publications Ltd, Switzerland

PY - 2023/6/5

Y1 - 2023/6/5

N2 - Bias temperature instability (BTI) in SiC MOSFETs has come under significant academic and industrial research. Threshold voltage (VTH) shift due to gate voltage stress has been demonstrated in several studies investigating gate oxide reliability in SiC MOSFETs. Results have shown positive.VTH shift occurs due to electron trapping (PBTI), and negative VTH shift occurs due to hole trapping (NBTI). In this paper, VTH shift is studied for unipolar and bipolar gate pulses with frequencies ranging from 1Hz to 100 kHz. The turn-OFF voltage for the unipolar VGS pulse is 0 V. In the case of the bipolar VGS pulses, two turn-OFF voltages are investigated, namely VGS-OFF = -3V and VGS-OFF= -5V. VTH shift is measured after 1000 seconds with recovery times in the range of 20 milliseconds, and preconditioning is performed before VTH measurement. These measurements have been performed at 25°C and 150°C on a commercially available SiC Planar MOSFET and a SiC Trench MOSFET. The results show that -3 V is enough for de-trapping sufficient electrons while -5V results in increased NBTI, which is accelerated by higher temperatures.

AB - Bias temperature instability (BTI) in SiC MOSFETs has come under significant academic and industrial research. Threshold voltage (VTH) shift due to gate voltage stress has been demonstrated in several studies investigating gate oxide reliability in SiC MOSFETs. Results have shown positive.VTH shift occurs due to electron trapping (PBTI), and negative VTH shift occurs due to hole trapping (NBTI). In this paper, VTH shift is studied for unipolar and bipolar gate pulses with frequencies ranging from 1Hz to 100 kHz. The turn-OFF voltage for the unipolar VGS pulse is 0 V. In the case of the bipolar VGS pulses, two turn-OFF voltages are investigated, namely VGS-OFF = -3V and VGS-OFF= -5V. VTH shift is measured after 1000 seconds with recovery times in the range of 20 milliseconds, and preconditioning is performed before VTH measurement. These measurements have been performed at 25°C and 150°C on a commercially available SiC Planar MOSFET and a SiC Trench MOSFET. The results show that -3 V is enough for de-trapping sufficient electrons while -5V results in increased NBTI, which is accelerated by higher temperatures.

UR - http://dx.doi.org/10.4028/p-lidhbt

U2 - 10.4028/p-lidhbt

DO - 10.4028/p-lidhbt

M3 - Article (Academic Journal)

SN - 0255-5476

VL - 1091

SP - 61

EP - 66

JO - Materials Science Forum

JF - Materials Science Forum

ER -

Impact of Turn-Off Gate Voltage and Temperature on Threshold Voltage Instability in Pulsed Gate Voltage Stresses of SiC MOSFETs

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