Implementation of Recursive Ling Adders in CMOS VLSI

N Burgess

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

4 Citations (Scopus)

Abstract

This paper presents a number of practical suggestions for implementing recursive Ling adders in deep-submicron CMOS VLSI. These adders were introduced by Jackson and Talwar in 2002 but no subsequent work has appeared describing their VLSI realisation. In this paper, we discuss how such adders might be implemented and show that recursive Ling adders are up to 34% smaller for the same speed or up to 15% faster for the same area than other recently-announced 16- and 32-b CMOS VLSI adders
Translated title of the contributionImplementation of Recursive Ling Adders in CMOS VLSI
Original languageEnglish
Title of host publicationProc. 43rd IEEE Asilomar Conference on Signals, Systems and Computers
Pages1777 - 1781
Number of pages5
Publication statusPublished - 2009

Bibliographical note

Name and Venue of Event: Asilomar, CA
Conference Organiser: IEEE

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