Implementation of Recursive Ling Adders in CMOS VLSI

N Burgess

Implementation of Recursive Ling Adders in CMOS VLSI

N Burgess

Department of Electrical & Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

4 Citations (Scopus)

Abstract

This paper presents a number of practical suggestions for implementing recursive Ling adders in deep-submicron CMOS VLSI. These adders were introduced by Jackson and Talwar in 2002 but no subsequent work has appeared describing their VLSI realisation. In this paper, we discuss how such adders might be implemented and show that recursive Ling adders are up to 34% smaller for the same speed or up to 15% faster for the same area than other recently-announced 16- and 32-b CMOS VLSI adders

Translated title of the contribution	Implementation of Recursive Ling Adders in CMOS VLSI
Original language	English
Title of host publication	Proc. 43rd IEEE Asilomar Conference on Signals, Systems and Computers
Pages	1777 - 1781
Number of pages	5
Publication status	Published - 2009

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Name and Venue of Event: Asilomar, CA
Conference Organiser: IEEE

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@inproceedings{396d51543076448cb6044d979230f770,

title = "Implementation of Recursive Ling Adders in CMOS VLSI",

abstract = "This paper presents a number of practical suggestions for implementing recursive Ling adders in deep-submicron CMOS VLSI. These adders were introduced by Jackson and Talwar in 2002 but no subsequent work has appeared describing their VLSI realisation. In this paper, we discuss how such adders might be implemented and show that recursive Ling adders are up to 34% smaller for the same speed or up to 15% faster for the same area than other recently-announced 16- and 32-b CMOS VLSI adders",

author = "N Burgess",

note = "Name and Venue of Event: Asilomar, CA Conference Organiser: IEEE",

year = "2009",

language = "English",

pages = "1777 -- 1781",

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T1 - Implementation of Recursive Ling Adders in CMOS VLSI

AU - Burgess, N

N1 - Name and Venue of Event: Asilomar, CA Conference Organiser: IEEE

PY - 2009

Y1 - 2009

N2 - This paper presents a number of practical suggestions for implementing recursive Ling adders in deep-submicron CMOS VLSI. These adders were introduced by Jackson and Talwar in 2002 but no subsequent work has appeared describing their VLSI realisation. In this paper, we discuss how such adders might be implemented and show that recursive Ling adders are up to 34% smaller for the same speed or up to 15% faster for the same area than other recently-announced 16- and 32-b CMOS VLSI adders

AB - This paper presents a number of practical suggestions for implementing recursive Ling adders in deep-submicron CMOS VLSI. These adders were introduced by Jackson and Talwar in 2002 but no subsequent work has appeared describing their VLSI realisation. In this paper, we discuss how such adders might be implemented and show that recursive Ling adders are up to 34% smaller for the same speed or up to 15% faster for the same area than other recently-announced 16- and 32-b CMOS VLSI adders

M3 - Conference Contribution (Conference Proceeding)

SP - 1777

EP - 1781

BT - Proc. 43rd IEEE Asilomar Conference on Signals, Systems and Computers

ER -

Implementation of Recursive Ling Adders in CMOS VLSI

Abstract

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