Logic LOT: Logic Optimization with Testability--New Transformations for Logic Synthesis

M Chatterjee, DK Pradhan, W Kunz

Research output: Contribution to journalArticle (Academic Journal)

12 Citations (Scopus)
Translated title of the contributionLogic LOT: Logic Optimization with Testability--New Transformations for Logic Synthesis
Original languageEnglish
Pages (from-to)386 - 399
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume17 (5)
Publication statusPublished - 1998

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