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Low Thermal Boundary Resistance Interfaces for GaN-on-Diamond Devices

Research output: Contribution to journalArticle

Original languageEnglish
Pages (from-to)24302-24309
Number of pages8
JournalACS Applied Materials and Interfaces
Issue number28
Early online date25 Jun 2018
DateAccepted/In press - 25 Jun 2018
DateE-pub ahead of print - 25 Jun 2018
DatePublished (current) - 18 Jul 2018


The development of GaN-on-diamond devices holds much promise for the creation of high-power density electronics. Inherent to the growth of these devices, a dielectric layer is placed between the GaN and diamond, which can contribute significantly to the overall thermal resistance of the structure. In this work, we explore the role of different interfaces in contributing to the thermal resistance of the interface of GaN/diamond layers, specifically using 5 nm layers of AlN, SiN, or no interlayer at all. Using time-domain thermoreflectance along with electron energy loss spectroscopy, we were able to determine that a SiN interfacial layer provided the lowest thermal boundary resistance (<10 m2K/GW) because of the formation of an Si-C-N layer at the interface. The AlN and no interlayer samples were observed to have TBRs greater than 20 m2K/GW as a result of a harsh growth environment that roughened the interface (enhancing phonon scattering) when the GaN was not properly protected.

    Structured keywords

  • CDTR

    Research areas

  • GaN-on-diamond devices, interfacial composition, thermal boundary resistance, time-domain thermoreflectance



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