Skip to main navigation Skip to search Skip to main content

Matrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories

  • Argyrides Costas
  • , Zarandi Hamid
  • , Dhiraj Pradhan

    Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

    55 Citations (Scopus)
    Translated title of the contributionMatrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories
    Original languageEnglish
    Title of host publication22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'07)
    Publication statusPublished - 2007

    Bibliographical note

    Other page information: -
    Conference Proceedings/Title of Journal: 22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'07)
    Other identifier: 2000733

    Cite this