TY - JOUR
T1 - Measurement and simulation of short circuit current sharing under parallel connection
T2 - SiC MOSFETs and SiC Cascode JFETs
AU - Wu, R.
AU - Agbo, S. N.
AU - Mendy, S.
AU - Bashar, E.
AU - Jahdi, S.
AU - Gonzalez, Ortiz
AU - Alatise, O.
N1 - Funding Information:
This work was supported by EPSRC through the grant reference EP/R004366/1 .
Publisher Copyright:
© 2021
PY - 2021/11/1
Y1 - 2021/11/1
N2 - Short-Circuit (SC) current sharing in parallel connected SiC MOSFETs and SiC Cascode JFETs have been investigated using experimental measurements and finite element models. Device parametric variation between parallel devices contributes to uneven current sharing and reduced module robustness against SC events. Experimental measurements show that threshold voltage variation is the most critical parameter in SiC MOSFETs, more so than device switching rate and initial junction temperature. The temperature coefficient of the ON-state and saturation resistance of SiC Cascode JFETs is higher than that of the SiC MOSFETs, hence, the short-circuit energy is lower because the SC current is limited more quickly in the SiC Cascode JFETs compared to SiC MOSFETs. Also, the input silicon MOSFET in the Cascode arrangement ensures better performance regarding VTH mismatch between parallel devices under SC. This is because the threshold voltage variation is less in silicon MOSFETs compared to SiC MOSFETs. Finite element models have been used to explore the differences between SiC MOSFETs and SiC Cascode JFETs under SC conditions and to explain why JFETs are better at suppressing SC currents than MOSFETs.
AB - Short-Circuit (SC) current sharing in parallel connected SiC MOSFETs and SiC Cascode JFETs have been investigated using experimental measurements and finite element models. Device parametric variation between parallel devices contributes to uneven current sharing and reduced module robustness against SC events. Experimental measurements show that threshold voltage variation is the most critical parameter in SiC MOSFETs, more so than device switching rate and initial junction temperature. The temperature coefficient of the ON-state and saturation resistance of SiC Cascode JFETs is higher than that of the SiC MOSFETs, hence, the short-circuit energy is lower because the SC current is limited more quickly in the SiC Cascode JFETs compared to SiC MOSFETs. Also, the input silicon MOSFET in the Cascode arrangement ensures better performance regarding VTH mismatch between parallel devices under SC. This is because the threshold voltage variation is less in silicon MOSFETs compared to SiC MOSFETs. Finite element models have been used to explore the differences between SiC MOSFETs and SiC Cascode JFETs under SC conditions and to explain why JFETs are better at suppressing SC currents than MOSFETs.
KW - Cascode JFET
KW - MOSFET
KW - Short-circuit
KW - Silicon carbide
UR - http://www.scopus.com/inward/record.url?scp=85120890463&partnerID=8YFLogxK
U2 - 10.1016/j.microrel.2021.114271
DO - 10.1016/j.microrel.2021.114271
M3 - Article (Academic Journal)
AN - SCOPUS:85120890463
SN - 0026-2714
VL - 126
JO - Microelectronics Reliability
JF - Microelectronics Reliability
M1 - 114271
ER -