Abstract
Matrix multiplication is a computationally intensive task, and existing neural network training approaches often require substantial energy and time due to frequent data movement between memory and processing units in traditional von Neumann architectures. This inefficiency has prompted growing interest in alternative computational paradigms. In this work, we present the design and implementation of a ternary-weight memristive architecture employing memristor differential pairs for image classification tasks. The proposed system utilizes weight columns composed exclusively of ternary values (-1,0, and 1), thereby significantly reducing programming complexity and time. Simulation results demonstrate that, relative to full-precision implementations, the proposed architecture achieves enhanced computational efficiency while maintaining a classification accuracy of 96%, underscoring its potential for future edge computing applications.
| Original language | English |
|---|---|
| Title of host publication | 2025 IEEE Nordic Circuits and Systems Conference (NorCAS) |
| Editors | Jari Nurmi, Dmitrijs Pikulins, Peeter Ellervee, John Liobe |
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| Number of pages | 6 |
| ISBN (Electronic) | 9798331515010 |
| ISBN (Print) | 9798331515027 |
| DOIs | |
| Publication status | Published - 17 Nov 2025 |
| Event | 2025 IEEE Nordic Circuits and Systems Conference, NORCAS 2025 - Riga, Latvia Duration: 28 Oct 2025 → 29 Oct 2025 |
Publication series
| Name | 2025 IEEE Nordic Circuits and Systems Conference, NORCAS 2025 - Proceedings |
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Conference
| Conference | 2025 IEEE Nordic Circuits and Systems Conference, NORCAS 2025 |
|---|---|
| Country/Territory | Latvia |
| City | Riga |
| Period | 28/10/25 → 29/10/25 |
Bibliographical note
Publisher Copyright:© 2025 IEEE.
Keywords
- Compute in Memory
- Memristor
- Ternary Weight Network
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