MODD for CF: a representation for fast evaluation of multiple-output functions

TL Rajaprabhu, AK Singh, AM Jabir, D Pradhan

Research output: Contribution to journalArticle (Academic Journal)

1 Citation (Scopus)

Abstract

Recently a mathematical framework was presented that bridges the gap between bit level BDD representation and word level representations such as BMD and TED. Here we present an approach that demonstrates that these diagrams admit fast evaluation of circuits for multiple outputs. The representation is based on characteristic function which provides faster evaluation time as well as compact representation. The average path length is used as a metric for evaluation time. The results obtained for benchmark circuits shows lesser number of nodes and faster evaluation time compared to binary representation
Translated title of the contributionMODD for CF: a representation for fast evaluation of multiple-output functions
Original languageEnglish
Pages (from-to)61 - 66
Number of pages5
JournalNinth IEEE International High-Level Design Validation and Test Workshop, 2004.
Publication statusPublished - Nov 2004

Bibliographical note

Publisher: OMNIPRESS

Fingerprint Dive into the research topics of 'MODD for CF: a representation for fast evaluation of multiple-output functions'. Together they form a unique fingerprint.

Cite this