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Abstract
This study presents a programmable and configurable motion estimation (ME) processor capable of performing ME across several state-of-the-art video codecs that include multiple tools to improve the accuracy of the calculated motion vectors. The core can be programmed using a C-style syntax optimised to implement arbitrary block matching algorithms and configured with different execution units depending on the selected codec, the available inter-coding options and required performance. This flexibility means that the core can support the latest video codecs such as H.264, VC-1 and AVS at high-definition resolutions and frame rates. The configuration and programming phases are supported by an integrated development environment that includes a compiler and profiling tools enabling a designer without specific hardware knowledge to optimise the microarchitecture for the selected codec standard and motion search technique leading to a highly efficient implementation.
Translated title of the contribution | Multi-standard reconfigurable motion estimation processor for hybrid video codecs |
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Original language | English |
Pages (from-to) | 73 - 85 |
Number of pages | 13 |
Journal | IET Computers and Digital Techniques |
Volume | 5 |
Issue number | 2 |
DOIs | |
Publication status | Published - Mar 2011 |
Bibliographical note
Publisher: IETFingerprint
Dive into the research topics of 'Multi-standard reconfigurable motion estimation processor for hybrid video codecs'. Together they form a unique fingerprint.Projects
- 1 Finished
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DYNAMICALLY RECONFIGURABLE HARDWARE ARCHITECTURES FOR CONTEXT-BASED STATISTICAL COMPRESSION OF VISUAL AND DATA CONTENT
Nunez-Yanez, J. L. (Principal Investigator)
22/02/06 → 22/02/09
Project: Research