Multiple bits Error Detection and Correction in GF Arithmetic Circuits

Jimson Mathew, P Mahesh, A.M. Jabir, Pradhan Dhiraj

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

8 Citations (Scopus)
Translated title of the contributionMultiple bits Error Detection and Correction in GF Arithmetic Circuits
Original languageEnglish
Title of host publicationInternational Symposium on Electronic System Design (ISED)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Publication statusPublished - 2010

Bibliographical note

Other page information: -
Conference Proceedings/Title of Journal: International Symposium on Electronic System Design (ISED)
Other identifier: 2001397

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