Multiple SEU Tolerance in LUTs of FPGAs Using Protected Schemes

Argyrides Costas, Zarandi H., Dhiraj Pradhan

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

1 Citation (Scopus)
Translated title of the contributionMultiple SEU Tolerance in LUTs of FPGAs Using Protected Schemes
Original languageEnglish
Title of host publication9th European Conference on Radiation Effects on Components and Systems – RADECS 2008
Publication statusPublished - 2008

Bibliographical note

Other page information: -
Conference Proceedings/Title of Journal: 9th European Conference on Radiation Effects on Components and Systems – RADECS 2008
Other identifier: 2001054

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