Abstract
The paper describes investigations into multiprocessor scheduling techniques for high quality audio DSP. A DSP processor/multiprocessor simulator is introduced which allows register-level simulation of multiprocessor DSP architectures and parallel DSP algorithms. The simulator has been used to investigate the implementation of recursive filtering algorithms for audio, using multiprocessor DSP architectures. Results from these studies are presented and discussed. Also described are multiprocessor DSP algorithm mapping and scheduling techniques based on genetic algorithms. These investigate techniques using genetic algorithms to schedule audio DSP algorithms written in the form of data flow graphs onto specified DSP multiprocessor arrays. The basic techniques are described and initial results from these studies are also presented and discussed
| Translated title of the contribution | Multiprocessor Scheduling for High Quality Digital Audio |
|---|---|
| Original language | English |
| Title of host publication | Unknown |
| Publisher | Institution of Engineering and Technology (IET) |
| Pages | 2/1 - 2/8 |
| Volume | 13 |
| DOIs | |
| Publication status | Published - May 1995 |
| Event | IEE Colloquium on Multiprocessor DSP (Digital Signal Processing) - Applications, Algorithms and Architectures - London, United States Duration: 1 May 1995 → … |
Publication series
| Name | |
|---|---|
| ISSN (Print) | 09633308 |
Conference
| Conference | IEE Colloquium on Multiprocessor DSP (Digital Signal Processing) - Applications, Algorithms and Architectures |
|---|---|
| Country/Territory | United States |
| City | London |
| Period | 1/05/95 → … |
Bibliographical note
Conference Proceedings/Title of Journal: IEE Coll. on Multiprocessor DSP, MayRose publication type: Conference contribution
Sponsorship: The authors gratefully acknowledge the support of Sony Broadcast and Professional Europe and The Centre for Communications Research, University of Bristol
Other identifier: Digest no. 1995/116