Multiprocessor scheduling for high quality digital audio

RW Amphlett; DR Bull

doi:10.1049/ic:19950775

Multiprocessor scheduling for high quality digital audio

RW Amphlett, DR Bull

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

Abstract

The paper describes investigations into multiprocessor scheduling techniques for high quality audio DSP. A DSP processor/multiprocessor simulator is introduced which allows register-level simulation of multiprocessor DSP architectures and parallel DSP algorithms. The simulator has been used to investigate the implementation of recursive filtering algorithms for audio, using multiprocessor DSP architectures. Results from these studies are presented and discussed. Also described are multiprocessor DSP algorithm mapping and scheduling techniques based on genetic algorithms. These investigate techniques using genetic algorithms to schedule audio DSP algorithms written in the form of data flow graphs onto specified DSP multiprocessor arrays. The basic techniques are described and initial results from these studies are also presented and discussed

Translated title of the contribution	Multiprocessor Scheduling for High Quality Digital Audio
Original language	English
Title of host publication	Unknown
Publisher	Institution of Engineering and Technology (IET)
Pages	2/1 - 2/8
Volume	13
DOIs	https://doi.org/10.1049/ic:19950775
Publication status	Published - May 1995
Event	IEE Colloquium on Multiprocessor DSP (Digital Signal Processing) - Applications, Algorithms and Architectures - London, United States Duration: 1 May 1995 → …

Publication series

Name
ISSN (Print)	09633308

Conference

Conference	IEE Colloquium on Multiprocessor DSP (Digital Signal Processing) - Applications, Algorithms and Architectures
Country/Territory	United States
City	London
Period	1/05/95 → …

Bibliographical note

Conference Proceedings/Title of Journal: IEE Coll. on Multiprocessor DSP, May
Rose publication type: Conference contribution

Sponsorship: The authors gratefully acknowledge the support of Sony Broadcast and Professional Europe and The Centre for Communications Research, University of Bristol

Other identifier: Digest no. 1995/116

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10.1049/ic:19950775

http://hdl.handle.net/1983/1500

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title = "Multiprocessor scheduling for high quality digital audio",

abstract = "The paper describes investigations into multiprocessor scheduling techniques for high quality audio DSP. A DSP processor/multiprocessor simulator is introduced which allows register-level simulation of multiprocessor DSP architectures and parallel DSP algorithms. The simulator has been used to investigate the implementation of recursive filtering algorithms for audio, using multiprocessor DSP architectures. Results from these studies are presented and discussed. Also described are multiprocessor DSP algorithm mapping and scheduling techniques based on genetic algorithms. These investigate techniques using genetic algorithms to schedule audio DSP algorithms written in the form of data flow graphs onto specified DSP multiprocessor arrays. The basic techniques are described and initial results from these studies are also presented and discussed",

author = "RW Amphlett and DR Bull",

note = "Conference Proceedings/Title of Journal: IEE Coll. on Multiprocessor DSP, May Rose publication type: Conference contribution Sponsorship: The authors gratefully acknowledge the support of Sony Broadcast and Professional Europe and The Centre for Communications Research, University of Bristol Other identifier: Digest no. 1995/116; IEE Colloquium on Multiprocessor DSP (Digital Signal Processing) - Applications, Algorithms and Architectures ; Conference date: 01-05-1995",

year = "1995",

month = may,

doi = "10.1049/ic:19950775",

language = "English",

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publisher = "Institution of Engineering and Technology (IET)",

pages = "2/1 -- 2/8",

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AU - Amphlett, RW

AU - Bull, DR

N1 - Conference Proceedings/Title of Journal: IEE Coll. on Multiprocessor DSP, May Rose publication type: Conference contribution Sponsorship: The authors gratefully acknowledge the support of Sony Broadcast and Professional Europe and The Centre for Communications Research, University of Bristol Other identifier: Digest no. 1995/116

PY - 1995/5

Y1 - 1995/5

N2 - The paper describes investigations into multiprocessor scheduling techniques for high quality audio DSP. A DSP processor/multiprocessor simulator is introduced which allows register-level simulation of multiprocessor DSP architectures and parallel DSP algorithms. The simulator has been used to investigate the implementation of recursive filtering algorithms for audio, using multiprocessor DSP architectures. Results from these studies are presented and discussed. Also described are multiprocessor DSP algorithm mapping and scheduling techniques based on genetic algorithms. These investigate techniques using genetic algorithms to schedule audio DSP algorithms written in the form of data flow graphs onto specified DSP multiprocessor arrays. The basic techniques are described and initial results from these studies are also presented and discussed

AB - The paper describes investigations into multiprocessor scheduling techniques for high quality audio DSP. A DSP processor/multiprocessor simulator is introduced which allows register-level simulation of multiprocessor DSP architectures and parallel DSP algorithms. The simulator has been used to investigate the implementation of recursive filtering algorithms for audio, using multiprocessor DSP architectures. Results from these studies are presented and discussed. Also described are multiprocessor DSP algorithm mapping and scheduling techniques based on genetic algorithms. These investigate techniques using genetic algorithms to schedule audio DSP algorithms written in the form of data flow graphs onto specified DSP multiprocessor arrays. The basic techniques are described and initial results from these studies are also presented and discussed

U2 - 10.1049/ic:19950775

DO - 10.1049/ic:19950775

M3 - Conference Contribution (Conference Proceeding)

VL - 13

SP - 2/1 - 2/8

BT - Unknown

PB - Institution of Engineering and Technology (IET)

T2 - IEE Colloquium on Multiprocessor DSP (Digital Signal Processing) - Applications, Algorithms and Architectures

Y2 - 1 May 1995

ER -

Multiprocessor scheduling for high quality digital audio

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