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Non-deterministic multi-threading

Research output: Contribution to journalArticle

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Non-deterministic multi-threading. / Leadbitter, Peter; Page, Daniel; Smart, Nigel.

In: IEEE Transactions on Computers, Vol. 56, No. 7, 2007, p. 992-998.

Research output: Contribution to journalArticle

Harvard

Leadbitter, P, Page, D & Smart, N 2007, 'Non-deterministic multi-threading', IEEE Transactions on Computers, vol. 56, no. 7, pp. 992-998.

APA

Leadbitter, P., Page, D., & Smart, N. (2007). Non-deterministic multi-threading. IEEE Transactions on Computers, 56(7), 992-998.

Vancouver

Leadbitter P, Page D, Smart N. Non-deterministic multi-threading. IEEE Transactions on Computers. 2007;56(7):992-998.

Author

Leadbitter, Peter ; Page, Daniel ; Smart, Nigel. / Non-deterministic multi-threading. In: IEEE Transactions on Computers. 2007 ; Vol. 56, No. 7. pp. 992-998.

Bibtex

@article{499e2e547d764f7494ff1a409372f694,
title = "Non-deterministic multi-threading",
abstract = "The physical security of application specific embedded processors, such as those found in smart-cards, has becoming increasingly important since they are used more and more as conduits for sensitive financial and identity information. The advent of side-channel attacks has meant that a combination of algorithmic, software and hardware defence is required. In this paper we re-examine the issue of non-deterministic processors, simplifying previous designs using a multi-threaded architecture. From this simplification we are able to construct a formally reasoned assessment of the security level offered by such a device.",
author = "Peter Leadbitter and Daniel Page and Nigel Smart",
year = "2007",
language = "English",
volume = "56",
pages = "992--998",
journal = "IEEE Transactions on Computers",
issn = "0018-9340",
publisher = "IEEE Computer Society",
number = "7",

}

RIS - suitable for import to EndNote

TY - JOUR

T1 - Non-deterministic multi-threading

AU - Leadbitter, Peter

AU - Page, Daniel

AU - Smart, Nigel

PY - 2007

Y1 - 2007

N2 - The physical security of application specific embedded processors, such as those found in smart-cards, has becoming increasingly important since they are used more and more as conduits for sensitive financial and identity information. The advent of side-channel attacks has meant that a combination of algorithmic, software and hardware defence is required. In this paper we re-examine the issue of non-deterministic processors, simplifying previous designs using a multi-threaded architecture. From this simplification we are able to construct a formally reasoned assessment of the security level offered by such a device.

AB - The physical security of application specific embedded processors, such as those found in smart-cards, has becoming increasingly important since they are used more and more as conduits for sensitive financial and identity information. The advent of side-channel attacks has meant that a combination of algorithmic, software and hardware defence is required. In this paper we re-examine the issue of non-deterministic processors, simplifying previous designs using a multi-threaded architecture. From this simplification we are able to construct a formally reasoned assessment of the security level offered by such a device.

M3 - Article

VL - 56

SP - 992

EP - 998

JO - IEEE Transactions on Computers

JF - IEEE Transactions on Computers

SN - 0018-9340

IS - 7

ER -