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Non-deterministic processors: FPGA-based analysis of area, performance and security

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Standard

Non-deterministic processors: FPGA-based analysis of area, performance and security. / Grabher, Philipp; Groszschaedl, Johann; Page, Daniel.

Workshop on Embedded Systems Security - WESS. Association for Computing Machinery (ACM), 2009. p. 1--10.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Harvard

Grabher, P, Groszschaedl, J & Page, D 2009, Non-deterministic processors: FPGA-based analysis of area, performance and security. in Workshop on Embedded Systems Security - WESS. Association for Computing Machinery (ACM), pp. 1--10.

APA

Grabher, P., Groszschaedl, J., & Page, D. (2009). Non-deterministic processors: FPGA-based analysis of area, performance and security. In Workshop on Embedded Systems Security - WESS (pp. 1--10). Association for Computing Machinery (ACM).

Vancouver

Grabher P, Groszschaedl J, Page D. Non-deterministic processors: FPGA-based analysis of area, performance and security. In Workshop on Embedded Systems Security - WESS. Association for Computing Machinery (ACM). 2009. p. 1--10

Author

Grabher, Philipp ; Groszschaedl, Johann ; Page, Daniel. / Non-deterministic processors: FPGA-based analysis of area, performance and security. Workshop on Embedded Systems Security - WESS. Association for Computing Machinery (ACM), 2009. pp. 1--10

Bibtex

@inproceedings{549bc23e11734c17a687144c8bde8582,
title = "Non-deterministic processors: FPGA-based analysis of area, performance and security",
abstract = "Finding a suitable balance between performance and physical security can be a significant challenge when implementing cryptographic software. Although asymmetric primitives often afford inexpensive countermeasures against side-channel attack as a result of flexibility in the underlying mathematics, symmetric primitives are generally not as fortunate. The previously proposed NONDET processor architecture attempts to address this problem by securing generic workloads via micro-architectural countermeasures against DPA attack; in this paper we present the first concrete investigation of NONDET using AES as a case study. Our results indicate that versus an implementation of AES with no countermeasures, NONDET can significantly increase the number of acquisitions required for a successful DPA attack. Alternatively, versus an implementation using traditional software-based countermeasures such as randomisation and masking, NONDET can produce significant improvements in performance and memory footprint.",
author = "Philipp Grabher and Johann Groszschaedl and Daniel Page",
year = "2009",
language = "English",
pages = "1----10",
booktitle = "Workshop on Embedded Systems Security - WESS",
publisher = "Association for Computing Machinery (ACM)",
address = "United States",

}

RIS - suitable for import to EndNote

TY - GEN

T1 - Non-deterministic processors: FPGA-based analysis of area, performance and security

AU - Grabher, Philipp

AU - Groszschaedl, Johann

AU - Page, Daniel

PY - 2009

Y1 - 2009

N2 - Finding a suitable balance between performance and physical security can be a significant challenge when implementing cryptographic software. Although asymmetric primitives often afford inexpensive countermeasures against side-channel attack as a result of flexibility in the underlying mathematics, symmetric primitives are generally not as fortunate. The previously proposed NONDET processor architecture attempts to address this problem by securing generic workloads via micro-architectural countermeasures against DPA attack; in this paper we present the first concrete investigation of NONDET using AES as a case study. Our results indicate that versus an implementation of AES with no countermeasures, NONDET can significantly increase the number of acquisitions required for a successful DPA attack. Alternatively, versus an implementation using traditional software-based countermeasures such as randomisation and masking, NONDET can produce significant improvements in performance and memory footprint.

AB - Finding a suitable balance between performance and physical security can be a significant challenge when implementing cryptographic software. Although asymmetric primitives often afford inexpensive countermeasures against side-channel attack as a result of flexibility in the underlying mathematics, symmetric primitives are generally not as fortunate. The previously proposed NONDET processor architecture attempts to address this problem by securing generic workloads via micro-architectural countermeasures against DPA attack; in this paper we present the first concrete investigation of NONDET using AES as a case study. Our results indicate that versus an implementation of AES with no countermeasures, NONDET can significantly increase the number of acquisitions required for a successful DPA attack. Alternatively, versus an implementation using traditional software-based countermeasures such as randomisation and masking, NONDET can produce significant improvements in performance and memory footprint.

M3 - Conference contribution

SP - 1

EP - 10

BT - Workshop on Embedded Systems Security - WESS

PB - Association for Computing Machinery (ACM)

ER -