Optical RAM-enabled cache memory and optical routing for chip multiprocessors

George T. Kanellos; Theoni Alexoudi; Dimitrios Fitsios; Pavlos Maniotis; Chris Vagionas; Nikos Pleros

doi:10.1109/MOC.2015.7416497

Optical RAM-enabled cache memory and optical routing for chip multiprocessors

George T. Kanellos, Theoni Alexoudi, Dimitrios Fitsios, Pavlos Maniotis, Chris Vagionas, Nikos Pleros

High Performance Networks Group (HPN)

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

Abstract

In this article, we review our recent work in WDM-enabled optical RAM bank architectures and their optical all-passive peripheral modules that form a complete 16GHz optical cache memory physical layer design for Chip Multiprocessor configurations and we report on recently integrated InP-optical memory cells as the fundamental building blocks.

Original language	English
Title of host publication	MOC 2015 - Technical Digest of 20th Microoptics Conference
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
ISBN (Electronic)	9784863485433
DOIs	https://doi.org/10.1109/MOC.2015.7416497
Publication status	Published - 23 Feb 2016
Event	20th Microoptics Conference, MOC 2015 - Fukuoka, Japan Duration: 25 Oct 2015 → 28 Oct 2015

Conference

Conference	20th Microoptics Conference, MOC 2015
Country/Territory	Japan
City	Fukuoka
Period	25/10/15 → 28/10/15

Keywords

High-speed optical techniques
Optical fibers
Optical filters
Optical interconnections
Optical ring resonators
Random access memory

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10.1109/MOC.2015.7416497

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@inproceedings{ecb2bc8ecd124aa28fb8cad999726c83,

title = "Optical RAM-enabled cache memory and optical routing for chip multiprocessors",

abstract = "In this article, we review our recent work in WDM-enabled optical RAM bank architectures and their optical all-passive peripheral modules that form a complete 16GHz optical cache memory physical layer design for Chip Multiprocessor configurations and we report on recently integrated InP-optical memory cells as the fundamental building blocks.",

keywords = "High-speed optical techniques, Optical fibers, Optical filters, Optical interconnections, Optical ring resonators, Random access memory",

author = "Kanellos, \{George T.\} and Theoni Alexoudi and Dimitrios Fitsios and Pavlos Maniotis and Chris Vagionas and Nikos Pleros",

year = "2016",

month = feb,

day = "23",

doi = "10.1109/MOC.2015.7416497",

language = "English",

booktitle = "MOC 2015 - Technical Digest of 20th Microoptics Conference",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

address = "United States",

note = "20th Microoptics Conference, MOC 2015 ; Conference date: 25-10-2015 Through 28-10-2015",

}

Kanellos, GT, Alexoudi, T, Fitsios, D, Maniotis, P, Vagionas, C & Pleros, N 2016, Optical RAM-enabled cache memory and optical routing for chip multiprocessors. in MOC 2015 - Technical Digest of 20th Microoptics Conference., 7416497, Institute of Electrical and Electronics Engineers (IEEE), 20th Microoptics Conference, MOC 2015, Fukuoka, Japan, 25/10/15. https://doi.org/10.1109/MOC.2015.7416497

Optical RAM-enabled cache memory and optical routing for chip multiprocessors. / Kanellos, George T.; Alexoudi, Theoni; Fitsios, Dimitrios et al.
MOC 2015 - Technical Digest of 20th Microoptics Conference. Institute of Electrical and Electronics Engineers (IEEE), 2016. 7416497.

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

TY - GEN

T1 - Optical RAM-enabled cache memory and optical routing for chip multiprocessors

AU - Kanellos, George T.

AU - Alexoudi, Theoni

AU - Fitsios, Dimitrios

AU - Maniotis, Pavlos

AU - Vagionas, Chris

AU - Pleros, Nikos

PY - 2016/2/23

Y1 - 2016/2/23

N2 - In this article, we review our recent work in WDM-enabled optical RAM bank architectures and their optical all-passive peripheral modules that form a complete 16GHz optical cache memory physical layer design for Chip Multiprocessor configurations and we report on recently integrated InP-optical memory cells as the fundamental building blocks.

AB - In this article, we review our recent work in WDM-enabled optical RAM bank architectures and their optical all-passive peripheral modules that form a complete 16GHz optical cache memory physical layer design for Chip Multiprocessor configurations and we report on recently integrated InP-optical memory cells as the fundamental building blocks.

KW - High-speed optical techniques

KW - Optical fibers

KW - Optical filters

KW - Optical interconnections

KW - Optical ring resonators

KW - Random access memory

UR - https://www.scopus.com/pages/publications/84969498767

U2 - 10.1109/MOC.2015.7416497

DO - 10.1109/MOC.2015.7416497

M3 - Conference Contribution (Conference Proceeding)

AN - SCOPUS:84969498767

BT - MOC 2015 - Technical Digest of 20th Microoptics Conference

PB - Institute of Electrical and Electronics Engineers (IEEE)

T2 - 20th Microoptics Conference, MOC 2015

Y2 - 25 October 2015 through 28 October 2015

ER -

Optical RAM-enabled cache memory and optical routing for chip multiprocessors

Abstract

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Keywords

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