TY - JOUR
T1 - Optics in Computing
T2 - from photonic Network-on-Chip to Chip-to-Chip Interconnects and Disintegrated Architectures
AU - Alexoudi, Theonitsa
AU - Terzenidis, Nikolaos
AU - Pitris, Stelios
AU - Moralis-Pegios, Miltiadis
AU - Maniotis, Pavlos
AU - Vagionas, Christos
AU - Mitsolidou, Charoula
AU - Mourgias-Alexandris, George
AU - Kanellos, George T.
AU - Miliou, Amalia
AU - Vyrsokinos, Konstantinos
AU - Pleros, Nikos
PY - 2018/10/15
Y1 - 2018/10/15
N2 - Following a decade of radical advances in the areas of integrated photonics and computing architectures, we discuss the use of optics in the current computing landscape attempting to re-define and refine their role based on the progress in both research fields. We present the current set of critical challenges faced by the computing industry and provide a thorough review of photonic Network-on-Chip (pNoC) architectures and experimental demonstrations, concluding to the main obstacles that still impede the materialization of these concepts. We propose the employment of optics in chip-to-chip (C2C) computing architectures rather than on-chip layouts towards reaping their benefits while avoiding technology limitations on the way to manycore set-ups. We identify multisocket boards as the most prominent application area and present recent advances in optically enabled multisocket boards, revealing successful 40Gb/s transceiver and routing capabilities via integrated photonics. These results indicate the strong potential to bring energy consumption down by more than 60% compared to current QuickPath Interconnect (QPI) protocol, while turning multisocket architectures into a single-hop low-latency setup for even more than 4 interconnected sockets, which form currently the electronic baseline. We go one step further and demonstrate how optically-enabled 8-socket boards can be combined via a 256x256 Hipo-aos Optical Packet Switch into a powerful 256-node disaggregated system with less than 335nsec latency, forming a highly promising solution for the latency-critical rack-scale memory disaggregation era. Finally, we discuss the perspective for disintegrated computing via optical technologies as a means to increase the number of synergized high-performance cores overcoming die area constraints, introducing also the concept of cache disintegration via the use of future off-die ultra-fast optical cache memory chiplets.
AB - Following a decade of radical advances in the areas of integrated photonics and computing architectures, we discuss the use of optics in the current computing landscape attempting to re-define and refine their role based on the progress in both research fields. We present the current set of critical challenges faced by the computing industry and provide a thorough review of photonic Network-on-Chip (pNoC) architectures and experimental demonstrations, concluding to the main obstacles that still impede the materialization of these concepts. We propose the employment of optics in chip-to-chip (C2C) computing architectures rather than on-chip layouts towards reaping their benefits while avoiding technology limitations on the way to manycore set-ups. We identify multisocket boards as the most prominent application area and present recent advances in optically enabled multisocket boards, revealing successful 40Gb/s transceiver and routing capabilities via integrated photonics. These results indicate the strong potential to bring energy consumption down by more than 60% compared to current QuickPath Interconnect (QPI) protocol, while turning multisocket architectures into a single-hop low-latency setup for even more than 4 interconnected sockets, which form currently the electronic baseline. We go one step further and demonstrate how optically-enabled 8-socket boards can be combined via a 256x256 Hipo-aos Optical Packet Switch into a powerful 256-node disaggregated system with less than 335nsec latency, forming a highly promising solution for the latency-critical rack-scale memory disaggregation era. Finally, we discuss the perspective for disintegrated computing via optical technologies as a means to increase the number of synergized high-performance cores overcoming die area constraints, introducing also the concept of cache disintegration via the use of future off-die ultra-fast optical cache memory chiplets.
KW - Computer architecture
KW - computing architectures
KW - disintegrated computing
KW - macrochip
KW - multisocket boards
KW - Network-on-Chip
KW - Optical interconnections
KW - optical memory
KW - optical packet switch
KW - Optical packet switching
KW - Optics
KW - Photonics
KW - rack-scale disaggregation
KW - Silicon
KW - silicon photonics
KW - System-on-chip
UR - http://www.scopus.com/inward/record.url?scp=85055037432&partnerID=8YFLogxK
U2 - 10.1109/JLT.2018.2875995
DO - 10.1109/JLT.2018.2875995
M3 - Article (Academic Journal)
AN - SCOPUS:85055037432
SN - 0733-8724
JO - Journal of Lightwave Technology
JF - Journal of Lightwave Technology
ER -