Optimised OpenCL workgroup synthesis for hybrid ARM-FPGA devices

Mohammad Hosseinabady, Jose L Nunez-Yanez

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

6 Citations (Scopus)
578 Downloads (Pure)

Abstract

This paper presents a workgroup synthesis mechanism to compile an OpenCL kernel to FPGA-based accelerators embedded in a multi-core CPU system-on-a-chip (SoC). The OpenCL kernels considered in this paper exhibit regular data access patterns. Coping with the limited amount of internal memory in embedded FPGAs, the workgroup synthesis utilises a novel data access pattern formulation to describe the parallelism already provided by the OpenCL kernels. To provide an OpenCL framework prototype to validate the proposed technique, a source-to-source compiler that transforms the OpenCL kernel into C/C++ code is developed. Then vendor-specific high-level synthesis tools are used to convert the C/C++ code into the FPGA bitstream. Results based on popular real applications show up to 89.8% improvement in the execution time compared to other commercial FPGA OpenCL implementations.
Original languageEnglish
Title of host publication2015 25th International Conference on Field Programmable Logic and Applications (FPL 2015)
Subtitle of host publicationProceedings of a meeting held 2-4 September 2015, London, United Kingdom
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages6
ISBN (Print)9780993428005
DOIs
Publication statusPublished - 7 Oct 2015
Event25th International Conference on Field Programmable Logic and Applications, FPL 2015 - London, United Kingdom
Duration: 2 Sep 20154 Sep 2015

Publication series

NameInternational Conference on Field-programmable Logic and Applications Proceedings
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
ISSN (Print)1946-1488
ISSN (Electronic)1946-147X

Conference

Conference25th International Conference on Field Programmable Logic and Applications, FPL 2015
CountryUnited Kingdom
CityLondon
Period2/09/154/09/15

Keywords

  • FPGA
  • HLS
  • Hybrid ARM-FPGA Embedded System
  • OpenCL
  • POCL
  • ZYNQ

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    Hosseinabady, M., & Nunez-Yanez, J. L. (2015). Optimised OpenCL workgroup synthesis for hybrid ARM-FPGA devices. In 2015 25th International Conference on Field Programmable Logic and Applications (FPL 2015): Proceedings of a meeting held 2-4 September 2015, London, United Kingdom [7294016] (International Conference on Field-programmable Logic and Applications Proceedings). Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/FPL.2015.7294016