Current parallel graphics algorithms minimise memory access latency by tracing packets of coherent rays. This coherency, however, breaks down after several bounces, and is unsuited to acceleration techniques such as selective rendering. This paper presents an unbiased path tracing algorithm which is insensitive to the coherency of the rays traced, allowing it to run on diverse architectures including massively SIMD processors. Bins of path-atoms are created and processed to form a path tracing circular buffer. Latency is hidden by n-buffering the load/save operations between bins. We demonstrate our approach as an implementation on the massively parallel SIMD architecture, the ClearSpeed CSX600.
|Publication status||Published - 23 Apr 2008|
|Event||24th Spring conference on computer graphics (SCCG '08) - New York, United States|
Duration: 1 Mar 2008 → …
|Conference||24th Spring conference on computer graphics (SCCG '08)|
|Period||1/03/08 → …|