Abstract
The energy consumption of field-programmable gate arrays (FPGA) is
dominated by leakage currents and dynamic energy associated with
programmable interconnect. An FPGA built entirely from
nanoelectromechanical (NEM) relays can effectively eliminate leakage
energy losses, reduce the interconnect dynamic energy, operate at
temperatures >225 °C and tolerate radiation doses in excess of 100
Mrad, while hybrid FPGAs comprising both complementary
metal-oxide-semiconductor (CMOS) transistors and NEM relays (NEM-CMOS)
have the potential to realize improvements in performance and energy
efficiency. Large-scale integration of NEM relays, however, poses a
significant engineering challenge due to the presence of moving parts.
We discuss the design of FPGAs utilizing NEM relays based on a
heterogeneous 3-D integration scheme, and carry out a scaling study to
quantify key metrics related to performance and energy efficiency in
both NEM-only and NEM-CMOS FPGAs. We show how the integration scheme has
a profound effect on these metrics by changing the length of global
wires. The scaling regime beyond which net performance and energy
benefits is seen in NEM-CMOS over a baseline 90 nm CMOS technology is
defined by an effective relay beam length of 0.5 μm , on-resistance of 200 kΩ , and a via pitch of 0.4 μm
, all achievable with existing process technology. For ultra-low energy
applications that are not performance critical, NEM-only FPGAs can
provide close to 15× improvement in energy efficiency.
Original language | English |
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Pages (from-to) | 15997-16009 |
Number of pages | 13 |
Journal | IEEE Access |
Volume | 6 |
Early online date | 16 Mar 2018 |
DOIs | |
Publication status | Published - 18 Apr 2018 |
Keywords
- 3-terminal
- 4-terminal
- back-end-of-line
- CMOS
- energy efficiency
- Field programmable gate arrays
- FPGA
- high-temperature
- Integrated circuit interconnections
- integration
- MEMS
- Metals
- microelectromechanical
- nano switch
- Nanoelectromechanical
- Nanoelectromechanical systems
- NEMS
- non-volatile
- radiation-hard
- relay
- Relays
- Silicon
- Substrates
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Profiles
-
Dr I D B Pamunuwa
- Department of Electrical & Electronic Engineering - RAEng / Microchip Senior Research Fellow, Reader in Microelectronics
- Microelectronics
Person: Academic , Member