Power integrity optimization of 3D chips stacked through TSVs

Waqar Ahmad, Li-Rong Zheng, Roshan Weerasekera, Awet Yemane Weldezion, Hannu Tenhunen

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

6 Citations (Scopus)

Original language	Undefined/Unknown
Title of host publication	2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems
Pages	105-108
Number of pages	4
DOIs	https://doi.org/10.1109/EPEPS.2009.5338467
Publication status	Published - 2009

Research Groups and Themes

@inproceedings{b7e7b2b49c6e471383e49e9935e47de0,

title = "Power integrity optimization of 3D chips stacked through TSVs",

author = "Waqar Ahmad and Li-Rong Zheng and Roshan Weerasekera and Weldezion, {Awet Yemane} and Hannu Tenhunen",

year = "2009",

doi = "10.1109/EPEPS.2009.5338467",

language = "Undefined/Unknown",

pages = "105--108",

booktitle = "2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems",

}

TY - GEN

T1 - Power integrity optimization of 3D chips stacked through TSVs

AU - Ahmad, Waqar

AU - Zheng, Li-Rong

AU - Weerasekera, Roshan

AU - Weldezion, Awet Yemane

AU - Tenhunen, Hannu

PY - 2009

Y1 - 2009

U2 - 10.1109/EPEPS.2009.5338467

DO - 10.1109/EPEPS.2009.5338467

M3 - Conference Contribution (Conference Proceeding)

SP - 105

EP - 108

BT - 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems

ER -