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Abstract
An optimal implementation of 128Pt FFT/IFFT for low power IEEE 802.15.3a WPAN using pseudoparallel datapath structure is presented, where the 128Pt FFT is devolved into 8Pt and 16Pt FFTs and then once again by devolving the 16Pt FFT into 4 x 4 and 2 x 8. We analyze 128Pt FFT/IFFT architecture for various pseudoparallel 8Pt and 16Pt FFTs and an optimum datapath architecture is explored. It is suggested that there exists an optimum degree of parallelism for the given algorithm. The analysis demonstrated that with a modest increase in area one can achieve significant reduction in power. The proposed architectures complete one paralleltoparallel (i.e., when all input data are available in parallel and all output data are generated in parallel) 128point FFT computation in less than 312.5 ns and thereby meet the standard specification. The relative merits and demerits of these architectures have been analyzed from the algorithm as well as implementation point of view. Detailed power analysis of each of the architectures with a different number of data paths at block level is described. We found that from power perspective the architecture with eight datapaths is optimum. The core power consumption with optimum case is 60.6 MW which is only less than half of the latest reported 128point FFT design in 0.18u technology. Furthermore, a Single Event Upset (SEU) tolerant scheme for registers is also explored. The SEU tolerant scheme will not affect the performance, however, there is an increase power consumption of about 42 percent. Apart from the low power consumption, the advantages of the proposed architectures include reduced hardware complexity, regular data flow and simple counter based control.
Original language  English 

Pages (fromto)  871882 
Number of pages  12 
Journal  Circuits, Systems, and Signal Processing 
Volume  30 
Issue number  4 
DOIs  
Publication status  Published  Aug 2011 
Keywords
 PROCESSOR
 System on chip
 Single event upset
 FFT
 OFDM
 WPAN
 Low power
Projects
 1 Finished

SYNTHESIS AND OPTIMISATION OF DESIGNS BASED ON NOVEL CANONICAL ALGEBRAIC STRUCTURES
Pradhan, D. K.
1/10/08 → 1/12/11
Project: Research