Rail to rail CMOS complementary input stage with only one active differential pair at a time

Maria Rodanas Valero; Alejandro Roman-Loera; Jaime Ramírez-Angulo; Nicolas Medrano; Santiago Celma

doi:10.1587/elex.11.20140392

Rail to rail CMOS complementary input stage with only one active differential pair at a time

Maria Rodanas Valero
, Alejandro Roman-Loera
, Jaime Ramírez-Angulo
, Nicolas Medrano
, Santiago Celma

Cabot Institute for the Environment

Research output: Contribution to journal › Article (Academic Journal) › peer-review

2 Citations (Scopus)

Abstract

A simple scheme for rail to rail op-amp operation is introduced. The input stage uses complementary differential pairs but only one pair is active at a time. It uses very compact control circuitry. Experimental verification is provided from a test chip prototype in 0.5μm CMOS technology.

Original language	English
Article number	20140392
Journal	IEICE Electronics Express
Volume	11
Issue number	12
DOIs	https://doi.org/10.1587/elex.11.20140392
Publication status	Published - 2014

Keywords

Amplifiers
Analog integrated circuits
CMOS integrated circuits
Low-voltage low power design

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10.1587/elex.11.20140392

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@article{8e1568e0827b494190a7f1e2611bb9dd,

title = "Rail to rail CMOS complementary input stage with only one active differential pair at a time",

abstract = "A simple scheme for rail to rail op-amp operation is introduced. The input stage uses complementary differential pairs but only one pair is active at a time. It uses very compact control circuitry. Experimental verification is provided from a test chip prototype in 0.5μm CMOS technology.",

keywords = "Amplifiers, Analog integrated circuits, CMOS integrated circuits, Low-voltage low power design",

author = "Valero, \{Maria Rodanas\} and Alejandro Roman-Loera and Jaime Ram{\'i}rez-Angulo and Nicolas Medrano and Santiago Celma",

year = "2014",

doi = "10.1587/elex.11.20140392",

language = "English",

volume = "11",

journal = "IEICE Electronics Express",

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publisher = "Institute of Electronics Information Communication Engineers",

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TY - JOUR

T1 - Rail to rail CMOS complementary input stage with only one active differential pair at a time

AU - Valero, Maria Rodanas

AU - Roman-Loera, Alejandro

AU - Ramírez-Angulo, Jaime

AU - Medrano, Nicolas

AU - Celma, Santiago

PY - 2014

Y1 - 2014

N2 - A simple scheme for rail to rail op-amp operation is introduced. The input stage uses complementary differential pairs but only one pair is active at a time. It uses very compact control circuitry. Experimental verification is provided from a test chip prototype in 0.5μm CMOS technology.

AB - A simple scheme for rail to rail op-amp operation is introduced. The input stage uses complementary differential pairs but only one pair is active at a time. It uses very compact control circuitry. Experimental verification is provided from a test chip prototype in 0.5μm CMOS technology.

KW - Amplifiers

KW - Analog integrated circuits

KW - CMOS integrated circuits

KW - Low-voltage low power design

UR - https://www.scopus.com/pages/publications/84903135412

U2 - 10.1587/elex.11.20140392

DO - 10.1587/elex.11.20140392

M3 - Article (Academic Journal)

AN - SCOPUS:84903135412

SN - 1349-2543

VL - 11

JO - IEICE Electronics Express

JF - IEICE Electronics Express

IS - 12

M1 - 20140392

ER -

Rail to rail CMOS complementary input stage with only one active differential pair at a time

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Keywords

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