Realisation techniques for primitive operator infinite impulse response digital filters

DR Bull; DH Horrocks

doi:10.1109/ISCAS.1993.393794

Realisation techniques for primitive operator infinite impulse response digital filters

DR Bull
, DH Horrocks

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

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Abstract

This paper presents realisation techniques for IIR digital filters based on the primitive operator graph synthesis method. The approach exploits the redundancy present in the filter multiplier structure when the coefficients are invariant allowing partial result reuse throughout the filter structure. Results are presented for a range of elliptic filters with varying wordlength and order, realised using direct form, parallel and cascade structures. These show significant savings when compared with the equivalent canonical signed digit multiplier coding scheme.

Translated title of the contribution	Realisation Techniques for Primitive Operator Infinite Impulse Response Digital Filters
Original language	English
Title of host publication	Unknown
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	607 - 610
Number of pages	3
Volume	1
ISBN (Print)	078032813, 0780312813
DOIs	https://doi.org/10.1109/ISCAS.1993.393794
Publication status	Published - May 1993
Event	IEEE International Symposium on Circuits and Systems, 1993 (ISCAS '93) - Chicago, IL, United States Duration: 1 May 1993 → …

Conference

Conference	IEEE International Symposium on Circuits and Systems, 1993 (ISCAS '93)
Country/Territory	United States
City	Chicago, IL
Period	1/05/93 → …

Bibliographical note

Conference Proceedings/Title of Journal: Proc. IEEE Int. Sym. on Circuits and Systems
Rose publication type: Conference contribution

Terms of use: Copyright © 1993 IEEE. Reprinted from IEEE International Symposium on Circuits and Systems, 1993 (ISCAS '93).

This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Bristol's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to [email protected].

By choosing to view this document, you agree to all provisions of the copyright laws protecting it.

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10.1109/ISCAS.1993.393794

Bull ISCAS 1993Accepted author manuscript, 317 KB

http://hdl.handle.net/1983/1324

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title = "Realisation techniques for primitive operator infinite impulse response digital filters",

abstract = "This paper presents realisation techniques for IIR digital filters based on the primitive operator graph synthesis method. The approach exploits the redundancy present in the filter multiplier structure when the coefficients are invariant allowing partial result reuse throughout the filter structure. Results are presented for a range of elliptic filters with varying wordlength and order, realised using direct form, parallel and cascade structures. These show significant savings when compared with the equivalent canonical signed digit multiplier coding scheme.",

author = "DR Bull and DH Horrocks",

note = "Conference Proceedings/Title of Journal: Proc. IEEE Int. Sym. on Circuits and Systems Rose publication type: Conference contribution Terms of use: Copyright {\textcopyright} 1993 IEEE. Reprinted from IEEE International Symposium on Circuits and Systems, 1993 (ISCAS '93). This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Bristol's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to [email protected]. By choosing to view this document, you agree to all provisions of the copyright laws protecting it. ; IEEE International Symposium on Circuits and Systems, 1993 (ISCAS '93) ; Conference date: 01-05-1993",

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doi = "10.1109/ISCAS.1993.393794",

language = "English",

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publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

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T1 - Realisation techniques for primitive operator infinite impulse response digital filters

AU - Bull, DR

AU - Horrocks, DH

N1 - Conference Proceedings/Title of Journal: Proc. IEEE Int. Sym. on Circuits and Systems Rose publication type: Conference contribution Terms of use: Copyright © 1993 IEEE. Reprinted from IEEE International Symposium on Circuits and Systems, 1993 (ISCAS '93). This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Bristol's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to [email protected]. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.

PY - 1993/5

Y1 - 1993/5

N2 - This paper presents realisation techniques for IIR digital filters based on the primitive operator graph synthesis method. The approach exploits the redundancy present in the filter multiplier structure when the coefficients are invariant allowing partial result reuse throughout the filter structure. Results are presented for a range of elliptic filters with varying wordlength and order, realised using direct form, parallel and cascade structures. These show significant savings when compared with the equivalent canonical signed digit multiplier coding scheme.

AB - This paper presents realisation techniques for IIR digital filters based on the primitive operator graph synthesis method. The approach exploits the redundancy present in the filter multiplier structure when the coefficients are invariant allowing partial result reuse throughout the filter structure. Results are presented for a range of elliptic filters with varying wordlength and order, realised using direct form, parallel and cascade structures. These show significant savings when compared with the equivalent canonical signed digit multiplier coding scheme.

U2 - 10.1109/ISCAS.1993.393794

DO - 10.1109/ISCAS.1993.393794

M3 - Conference Contribution (Conference Proceeding)

SN - 078032813

SN - 0780312813

VL - 1

SP - 607

EP - 610

BT - Unknown

PB - Institute of Electrical and Electronics Engineers (IEEE)

T2 - IEEE International Symposium on Circuits and Systems, 1993 (ISCAS '93)

Y2 - 1 May 1993

ER -

Realisation techniques for primitive operator infinite impulse response digital filters

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