Reconfigurable High-speed Asynchronous I/O Ports for Flexible Protocol Support

Many I/O protocols have elements in common, which may be exploited and shared between multiple on-chip protocol implementations, to yield area and energy savings. However, current implementations of I/O functionality in chips place each protocol in its own dedicated block, and so this potential advantage is never gained. We highlight some elements that may be usefully shared between protocols and explain how a flexible, reconfigurable GCU may be constructed out of functional blocks using these elements. An overview of the structure of the generator is given, and it is shown that implementation in asynchronous logic yields significant advantages for the design over a conventional synchronous implementation. Finally, we show how the use of asynchronous FIFOs greatly simplifies the design of the system and allows simultaneous support of a number of protocols via the time-sliced re-use of the GCU fabric.