Reconfigure router design and evaluation for the FPGA-friendly SoCWire network-on-chip

Arash Farhadi Beldachi, Jose Nunez-Yanez

Research output: Contribution to conferenceConference Paper

Abstract

This paper extends the System-on-Chip Wire (SoCWire) Network-On-Chip (NoC) with a reconfigurable router suitable for building FPGA-based NoC. Different configurations of the SoCWireRouter with a varying number of local and multi-dimensional ports have been used to create a number of equivalent networks. The system is prototyped in a FPGA-based PCIexpress board with the NoC connected to a softcore processor that acts as system master and monitor. The evaluation of equivalent networks for a fixed number of computing nodes under a synthetic and realistic traffic loads indicates the ideal SoCWireRouter topology depends on the design objectives and expected traffic pattern.
Original languageEnglish
Publication statusPublished - 2012
EventFPGAworld '12 Proceedings of the Annual FPGA Conference - Stockholm, Copenhagen, Tampere, Sweden
Duration: 4 Sep 20125 Oct 2012
http://www.fpgaworld.com/

Conference

ConferenceFPGAworld '12 Proceedings of the Annual FPGA Conference
Period4/09/125/10/12
Internet address

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