Reducing the cost of single error correction with parity sharing

Pedro Reviriego, Salvatore Pontarelli, Juan Antonio Maestro, Marco Ottavi

Research output: Contribution to journalArticle (Academic Journal)

3 Citations (Scopus)

Abstract

Error correction codes (ECCs) are commonly used to protect memory devices from errors. The most commonly used codes are a simple parity bit and single-error-correction (SEC) codes. A parity bit enables single-bit error detection, whereas a SEC code can correct one-bit errors. A SEC code requires more additional bits per word and also more complex decoding that impacts delay. A tradeoff between both schemes is the use of a product code based on a combination of two parity bits. This approach reduces the memory overhead at the expense of a more complex access procedure. In this letter, an alternative scheme based on the use of parity sharing is proposed and evaluated. The results show that the new approach significantly reduces the memory overhead and is also capable of correcting single-bit errors.

Original languageEnglish
Article number6555813
Pages (from-to)420-422
Number of pages3
JournalIEEE Transactions on Device and Materials Reliability
Volume13
Issue number3
DOIs
Publication statusPublished - 17 Sep 2013

Keywords

  • Error correction codes
  • parity sharing
  • soft errors

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