Repeater Insertion to Minimise Delay in Coupled Interconnects

Dinesh Pamunuwa, Hannu Tenhunen

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

28 Citations (Scopus)

Abstract

Signalling over long interconnect is a dominant issue in electronic chip design in current technologies, with the device sizes getting smaller and smaller and the circuits becoming ever larger. Repeater insertion is a well established technique to minimise the propagation delay over long resistive interconnect. In deep sub-micron technologies, as the wires are spaced closer and closer together and signal rise and fall times go into the sub-nano second region, the coupling between interconnects assumes great significance. The resulting crosstalk has implications on the data throughput and on signal integrity. Depending on the data correlation on the coupled lines, the delay can either decrease or increase. In this paper we attempt to quantify the effect of worst-case capacitive crosstalk in parallel buses and look at how it affects repeater insertion in particular. We develop analytic expressions for the delay, buffer size and number that are suitable in a-priori timing analyses and signal integrity estimations. All equations are checked against a dynamic circuit simulator (SPECTRE)
Original languageUndefined/Unknown
Title of host publicationProc. IEEE International Conference on VLSI Design
Pages513-517
Number of pages5
DOIs
Publication statusPublished - 1 Jan 2001

Keywords

  • VLSI
  • circuit simulation
  • coupled circuits
  • crosstalk
  • delays
  • integrated circuit design
  • integrated circuit interconnections
  • repeaters
  • SPECTRE
  • buffer size
  • chip design
  • coupled interconnects
  • data throughput
  • deep sub-micron technologies
  • delay
  • device sizes
  • dynamic circuit simulator
  • fall times
  • long interconnect
  • parallel buses
  • propagation delay
  • repeater insertion
  • rise times
  • signal integrity
  • Chip scale packaging
  • Coupling circuits
  • Crosstalk
  • Delay estimation
  • Integrated circuit interconnections
  • Propagation delay
  • Repeaters
  • Signal analysis
  • Space technology
  • Wires

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