Abstract
In this paper, we propose a new method for test access and
test scheduling in NoC-based system. It relies on a progressive
reuse of the network resources for transporting test data
to routers. We present possible solutions to the implementation
of this scheme. We also show how the router testing
can be scheduled concurrently with core testing to reduce
test application time. Experimental results for the ITC?02
SoC benchmarks show that the proposed method can lead to
substantial reduction on test application time compared to
previous work based on the use of serial boundary scan. The
method can also help to reduce hardware overhead.
Translated title of the contribution | Reuse-Based Test Access and Integrated Test Scheduling for Network-on-Chip |
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Original language | English |
Title of host publication | Unknown |
Publisher | DATE 2006 |
Publication status | Published - Mar 2006 |