Reuse-Based Test Access and Integrated Test Scheduling for Network-on-Chip

C Liu, Z Link, D Pradhan

    Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

    22 Citations (Scopus)

    Abstract

    In this paper, we propose a new method for test access and test scheduling in NoC-based system. It relies on a progressive reuse of the network resources for transporting test data to routers. We present possible solutions to the implementation of this scheme. We also show how the router testing can be scheduled concurrently with core testing to reduce test application time. Experimental results for the ITC?02 SoC benchmarks show that the proposed method can lead to substantial reduction on test application time compared to previous work based on the use of serial boundary scan. The method can also help to reduce hardware overhead.
    Translated title of the contributionReuse-Based Test Access and Integrated Test Scheduling for Network-on-Chip
    Original languageEnglish
    Title of host publicationUnknown
    PublisherDATE 2006
    Publication statusPublished - Mar 2006

    Bibliographical note

    Conference Proceedings/Title of Journal: Design, Automation and Test in Europe Conference and Exhibition

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