Run-time power gating in hybrid ARM-FPGA devices

Mohammad Hosseinabady, Jose Luis Nunez-Yanez

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

18 Citations (Scopus)

Abstract

Energy proportional computing (EPC) enables the allocation of energy to tasks depending on computational demands. Computing at full speed and then dynamically turning off modules when they are not required for a period of time can be used to obtain EPC and it is an alternative to voltage scaling techniques in which the computation is slowed down. This paper investigates the viability of physical power gating FPGA devices that incorporate a hardened processor in a different power domain. The run-time power gating approach is applied to Xilinx ZYNQ devices that incorporate a hardened Cortex A9 multi-processor. The paper demonstrates that power down followed by a full reconfiguration can be controlled by the embedded processor autonomously. The results show that the minimum time that the FPGA fabric must remain in power-off state for the technique to be energy efficient is in the order of milliseconds and up to 96% power reduction occurs when the fabric voltage is lowered below critical level. These results take into account the overheads of controlling the programmable voltage regulators interfaced to the FPGA and the overhead of the reconfiguration needed when the device must be returned to the active state.

Original languageEnglish
Title of host publicationConference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
ISBN (Print)9783000446450
DOIs
Publication statusPublished - 1 Jan 2014
Event24th International Conference on Field Programmable Logic and Applications, FPL 2014 - Munich, United Kingdom
Duration: 1 Sep 20145 Sep 2014

Conference

Conference24th International Conference on Field Programmable Logic and Applications, FPL 2014
CountryUnited Kingdom
CityMunich
Period1/09/145/09/14

Keywords

  • Energy Proportional Computing
  • FPGA
  • Power Gating
  • ZYNQ

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    Hosseinabady, M., & Nunez-Yanez, J. L. (2014). Run-time power gating in hybrid ARM-FPGA devices. In Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014 [6927503] Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/FPL.2014.6927503