Run-time power modelling in embedded GPUs with dynamic voltage and frequency scaling

Jose Nunez-Yanez; Kris Nikov; Kerstin Eder; Mohammad Hosseinabady

doi:10.1145/3381427.3381429

Run-time power modelling in embedded GPUs with dynamic voltage and frequency scaling

Jose Nunez-Yanez, Kris Nikov, Kerstin Eder, Mohammad Hosseinabady

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

1 Citation (Scopus)

Abstract

This paper investigates the application of a robust CPU-based power modelling methodology that performs an automatic search of explanatory events derived from performance counters to embedded GPUs. A 64-bit Tegra TX1 SoC is configured with DVFS enabled and multiple CUDA benchmarks are used to train and test models optimized for each frequency and voltage point. These optimized models are then compared with a simpler unified model that uses a single set of model coefficients for all frequency and voltage points of interest. To obtain this unified model, a number of experiments are conducted to extract information on idle, clock and static power to derive power usage from a single reference equation. The results show that the unified model offers competitive accuracy with an average 5% error with four explanatory variables on the test data set and it is capable to correctly predict the impact of voltage, frequency and temperature on power consumption. This model could be used to replace direct power measurements when these are not available due to hardware limitations or worst-case analysis in emulation platforms.

Original language	English
Title of host publication	Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020
Publisher	Association for Computing Machinery
ISBN (Electronic)	9781450375450
DOIs	https://doi.org/10.1145/3381427.3381429
Publication status	Published - 21 Jan 2020
Event	11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020 - Bologna, Italy Duration: 21 Jan 2020 → …

Publication series

Name	ACM International Conference Proceeding Series

Conference

Conference	11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020
Country/Territory	Italy
City	Bologna
Period	21/01/20 → …

Bibliographical note

Funding Information:
This work was partially supported by the EPSRC ENEAC grant number EP/N002539/1, the H2020 TeamPlay project Grant agreement No.: 779882 and the Royal Society industrial fellowship MINET (Award: INF292044).

Publisher Copyright:
© 2020 Copyright held by the owner/author(s). Publication rights licensed to ACM.

Keywords

DVFS
Embedded GPU
GPU power modelling
Heterogeneous architecture
Multiple linear regression

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Cite this

Nunez-Yanez, J., Nikov, K., Eder, K., & Hosseinabady, M. (2020). Run-time power modelling in embedded GPUs with dynamic voltage and frequency scaling. In Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020 Article 3381429 (ACM International Conference Proceeding Series). Association for Computing Machinery. https://doi.org/10.1145/3381427.3381429

Nunez-Yanez, Jose ; Nikov, Kris ; Eder, Kerstin et al. / Run-time power modelling in embedded GPUs with dynamic voltage and frequency scaling. Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020. Association for Computing Machinery, 2020. (ACM International Conference Proceeding Series).

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abstract = "This paper investigates the application of a robust CPU-based power modelling methodology that performs an automatic search of explanatory events derived from performance counters to embedded GPUs. A 64-bit Tegra TX1 SoC is configured with DVFS enabled and multiple CUDA benchmarks are used to train and test models optimized for each frequency and voltage point. These optimized models are then compared with a simpler unified model that uses a single set of model coefficients for all frequency and voltage points of interest. To obtain this unified model, a number of experiments are conducted to extract information on idle, clock and static power to derive power usage from a single reference equation. The results show that the unified model offers competitive accuracy with an average 5\% error with four explanatory variables on the test data set and it is capable to correctly predict the impact of voltage, frequency and temperature on power consumption. This model could be used to replace direct power measurements when these are not available due to hardware limitations or worst-case analysis in emulation platforms.",

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Nunez-Yanez, J, Nikov, K, Eder, K & Hosseinabady, M 2020, Run-time power modelling in embedded GPUs with dynamic voltage and frequency scaling. in Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020., 3381429, ACM International Conference Proceeding Series, Association for Computing Machinery, 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020, Bologna, Italy, 21/01/20. https://doi.org/10.1145/3381427.3381429

Run-time power modelling in embedded GPUs with dynamic voltage and frequency scaling. / Nunez-Yanez, Jose; Nikov, Kris; Eder, Kerstin et al.
Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020. Association for Computing Machinery, 2020. 3381429 (ACM International Conference Proceeding Series).

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

TY - GEN

T1 - Run-time power modelling in embedded GPUs with dynamic voltage and frequency scaling

AU - Nunez-Yanez, Jose

AU - Nikov, Kris

AU - Eder, Kerstin

AU - Hosseinabady, Mohammad

N1 - Funding Information: This work was partially supported by the EPSRC ENEAC grant number EP/N002539/1, the H2020 TeamPlay project Grant agreement No.: 779882 and the Royal Society industrial fellowship MINET (Award: INF292044). Publisher Copyright: © 2020 Copyright held by the owner/author(s). Publication rights licensed to ACM.

PY - 2020/1/21

Y1 - 2020/1/21

N2 - This paper investigates the application of a robust CPU-based power modelling methodology that performs an automatic search of explanatory events derived from performance counters to embedded GPUs. A 64-bit Tegra TX1 SoC is configured with DVFS enabled and multiple CUDA benchmarks are used to train and test models optimized for each frequency and voltage point. These optimized models are then compared with a simpler unified model that uses a single set of model coefficients for all frequency and voltage points of interest. To obtain this unified model, a number of experiments are conducted to extract information on idle, clock and static power to derive power usage from a single reference equation. The results show that the unified model offers competitive accuracy with an average 5% error with four explanatory variables on the test data set and it is capable to correctly predict the impact of voltage, frequency and temperature on power consumption. This model could be used to replace direct power measurements when these are not available due to hardware limitations or worst-case analysis in emulation platforms.

AB - This paper investigates the application of a robust CPU-based power modelling methodology that performs an automatic search of explanatory events derived from performance counters to embedded GPUs. A 64-bit Tegra TX1 SoC is configured with DVFS enabled and multiple CUDA benchmarks are used to train and test models optimized for each frequency and voltage point. These optimized models are then compared with a simpler unified model that uses a single set of model coefficients for all frequency and voltage points of interest. To obtain this unified model, a number of experiments are conducted to extract information on idle, clock and static power to derive power usage from a single reference equation. The results show that the unified model offers competitive accuracy with an average 5% error with four explanatory variables on the test data set and it is capable to correctly predict the impact of voltage, frequency and temperature on power consumption. This model could be used to replace direct power measurements when these are not available due to hardware limitations or worst-case analysis in emulation platforms.

KW - DVFS

KW - Embedded GPU

KW - GPU power modelling

KW - Heterogeneous architecture

KW - Multiple linear regression

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DO - 10.1145/3381427.3381429

M3 - Conference Contribution (Conference Proceeding)

AN - SCOPUS:85082952079

T3 - ACM International Conference Proceeding Series

BT - Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020

PB - Association for Computing Machinery

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Nunez-Yanez J, Nikov K, Eder K, Hosseinabady M. Run-time power modelling in embedded GPUs with dynamic voltage and frequency scaling. In Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020. Association for Computing Machinery. 2020. 3381429. (ACM International Conference Proceeding Series). doi: 10.1145/3381427.3381429

Run-time power modelling in embedded GPUs with dynamic voltage and frequency scaling

Abstract

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Bibliographical note

Keywords

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ENergy Efficient Adaptive Computing with multi-grain heterogeneous architectures (ENEAC)

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Run-time power modelling in embedded GPUs with dynamic voltage and frequency scaling

Abstract

Publication series

Conference

Bibliographical note

Keywords

Access to Document

Handle.net

Other files and links

Fingerprint

Projects

ENergy Efficient Adaptive Computing with multi-grain heterogeneous architectures (ENEAC)

Cite this