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Run-time power and performance scaling with CPU-FPGA hybrids

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publication2014 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)
Publisher or commissioning bodyInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages6
ISBN (Print)978-1-4799-5356-1
DatePublished - 17 Jul 2014
Event2014 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2014 - Leicester, United Kingdom
Duration: 14 Jul 201418 Jul 2014


Conference2014 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2014
CountryUnited Kingdom


This paper investigates how a wide dynamic range of performance and power levels can be obtained in commercially available state-of-the-art hybrid FPGAs that include ARM embedded processors and independent power domains. Adaptive voltage and frequency scaling obtained with embedded in-situ detectors in a closed loop configuration is employed to scale performance and power in the FPGA fabric under processor control. The initial results are based on a high-performance motion estimation processor mapped to the FPGA fabric and show that it is possible to obtain energy savings higher than 60% or alternatively double performance at nominal energy. The available voltage and frequency margins in the device create a large number of performance and energy states with scaling possible at run-time with low overheads.

    Research areas

  • adaptive voltage scaling, energy efficient design, energy propotional computing, FPGA


2014 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2014

Duration14 Jul 201418 Jul 2014
CountryUnited Kingdom
SponsorsBio-Inspired Technol. Syst. (BITS), JPL (External organisation), et al. (External organisation), European Space Agency, Netherlands (ESA) (External organisation), IEEE Circuits and Systems Society (IEEE-CAS) (External organisation), National Aeronautics and Space Administration (NASA) (External organisation), Soc. Adaptive and Evolvable Hardware and Syst. (ADEVO) (External organisation)

Event: Conference

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  • Nunez-Yanez and Beldachi (2014) AHS Conference

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    Accepted author manuscript, 620 KB, PDF document


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