Scalar coprocessors for accelerating the G723.1 and G729A speech coders

VA Chouliaras; JL Nunez-Yanez

doi:10.1109/TCE.2003.1233807

Scalar coprocessors for accelerating the G723.1 and G729A speech coders

VA Chouliaras, JL Nunez-Yanez

Department of Electrical & Electronic Engineering

Research output: Contribution to journal › Article (Academic Journal) › peer-review

8 Citations (Scopus)

Abstract

We investigate two scalar coprocessors for accelerating the ITU-T G723.1 and G729A speech coders. Architecture space exploration indicates up to 72% reduction in the total number of instructions executed through the introduction of custom instructions and small changes to the C reference code. The accelerators are designed to be attached to a configurable embedded RISC CPU where they make use of the host register file and load/store infrastructure.

Translated title of the contribution	Scalar coprocessors for accelerating the G723.1 and G729A speech coders
Original language	English
Article number	Issue 3
Pages (from-to)	703 - 710
Number of pages	8
Journal	IEEE Transactions on Consumer Electronics
Volume	49
DOIs	https://doi.org/10.1109/TCE.2003.1233807
Publication status	Published - Aug 2003

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Publisher: Institute of Electrical and Electronics Engineers (IEEE)

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10.1109/TCE.2003.1233807

http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1233807&isnumber=27648&punumber=30&k2dockey=1233807@ieeejrns&query=%28+%28+nunez%3Cin%3Emetadata+%29+%29+%3Cand%3E+%28pyr+%3E%3D+2003+%3Cand%3E+pyr+%3C%3D+2006%29&pos=8

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abstract = "We investigate two scalar coprocessors for accelerating the ITU-T G723.1 and G729A speech coders. Architecture space exploration indicates up to 72% reduction in the total number of instructions executed through the introduction of custom instructions and small changes to the C reference code. The accelerators are designed to be attached to a configurable embedded RISC CPU where they make use of the host register file and load/store infrastructure.",

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AU - Nunez-Yanez, JL

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AB - We investigate two scalar coprocessors for accelerating the ITU-T G723.1 and G729A speech coders. Architecture space exploration indicates up to 72% reduction in the total number of instructions executed through the introduction of custom instructions and small changes to the C reference code. The accelerators are designed to be attached to a configurable embedded RISC CPU where they make use of the host register file and load/store infrastructure.

U2 - 10.1109/TCE.2003.1233807

DO - 10.1109/TCE.2003.1233807

M3 - Article (Academic Journal)

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JO - IEEE Transactions on Consumer Electronics

JF - IEEE Transactions on Consumer Electronics

M1 - Issue 3

ER -

Scalar coprocessors for accelerating the G723.1 and G729A speech coders

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