Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers

Jeremy J.O. Dalton; Jianjing Wang; Harry C.P. Dymond; Dawei Liu; Dinesh Pamunuwa; Bernard H. Stark; Neville McNeill; Simon J. Hollis

doi:10.1109/APEC.2017.7930970

Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers

Jeremy J.O. Dalton, Jianjing Wang, Harry C.P. Dymond, Dawei Liu, Dinesh Pamunuwa, Bernard H. Stark, Neville McNeill, Simon J. Hollis

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

14 Citations (Scopus)

369 Downloads (Pure)

Abstract

The application of active gate driving to 40 V GaN FETs has previously been shown to reduce ringing and EMI-generating spectral content in the switch-node voltage waveforms. This paper, for the first time, shows active gate driving applied to 650 V GaN FETs, and the shaping of device voltages and currents during switching transients. A custom integrated active gate driver is used, which can dynamically vary its output resistance from 0.12 to 64 Ω, with a 150 ps timing resolution. At 200 V DC link and 10 A load current, a significant degree of control over the active-switch drain current and switch-node voltage is demonstrated, for both buck and boost mode operation. The current overshoot and ringing in the power waveforms due to circuit parasitics are actively reduced and the voltage oscillations in the DC link are damped. The timing of resistance sequences is shown to be critical to the success of active shaping methods, thus justifying the unparalleled 150 ps resolution of the driver. Under continuous operation and at reduced ratings of 100 V and 2 A load current the significant control of the switch node voltage and voltage spectra is also demonstrated. The switching delay is reduced, and parts of the spectrum are reduced by up to 9 dB, equivalent to the effect of tripling the gate resistance but without any reduction in the overall switching speed.

Original language	English
Title of host publication	2017 IEEE Applied Power Electronics Conference and Exposition (APEC 2017)
Subtitle of host publication	Proceedings of a meeting held 26-30th March 2017, Tampa, FL, USA
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	1983-1989
Number of pages	7
ISBN (Electronic)	9781509053667
ISBN (Print)	9781509053674
DOIs	https://doi.org/10.1109/APEC.2017.7930970
Publication status	Published - Aug 2017
Event	32nd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2017 - Tampa, United States Duration: 26 Mar 2017 → 30 Mar 2017

Publication series

Name
ISSN (Print)	2470-6647

Conference

Conference	32nd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2017
Country	United States
City	Tampa
Period	26/03/17 → 30/03/17

Keywords

Active Gate Driver
Arbitrary Gate Impedance
Drain Current Profiling
Dynamic Output Resistance
GaN
Gate Voltage Profiling
HFET
Oscillation Reduction
Programmable Gate Resistance
Switch Node Voltage Profiling
Wide Band-gap

Access to Document

10.1109/APEC.2017.7930970

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Pulse quietening at source for higher-frequency power and signal switching
Dalton, J. J. O., Dymond, H. C. P., Liu, D., Mcneill, J. N., Pamunuwa, I. D. B., Wang, J., Hollis, S. & Stark, B. H.
17/06/13 → 16/06/18
Project: Research

Professor Bernard H Stark
- Bernard.Stark@bristol.ac.uk
- Department of Electrical & Electronic Engineering - Professor of Electrical Engineering
- SPHERE
- Cabot Institute for the Environment
- Electrical Energy Management
Person: Academic , Member

Cite this

Dalton, J. J. O., Wang, J., Dymond, H. C. P., Liu, D., Pamunuwa, D., Stark, B. H., McNeill, N., & Hollis, S. J. (2017). Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers. In 2017 IEEE Applied Power Electronics Conference and Exposition (APEC 2017): Proceedings of a meeting held 26-30th March 2017, Tampa, FL, USA (pp. 1983-1989). [7930970] Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/APEC.2017.7930970

Dalton, Jeremy J.O. ; Wang, Jianjing ; Dymond, Harry C.P. ; Liu, Dawei ; Pamunuwa, Dinesh ; Stark, Bernard H. ; McNeill, Neville ; Hollis, Simon J. / Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers. 2017 IEEE Applied Power Electronics Conference and Exposition (APEC 2017): Proceedings of a meeting held 26-30th March 2017, Tampa, FL, USA. Institute of Electrical and Electronics Engineers (IEEE), 2017. pp. 1983-1989

@inproceedings{988db92697a04d7bb14a4cc443413749,

title = "Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers",

abstract = "The application of active gate driving to 40 V GaN FETs has previously been shown to reduce ringing and EMI-generating spectral content in the switch-node voltage waveforms. This paper, for the first time, shows active gate driving applied to 650 V GaN FETs, and the shaping of device voltages and currents during switching transients. A custom integrated active gate driver is used, which can dynamically vary its output resistance from 0.12 to 64 Ω, with a 150 ps timing resolution. At 200 V DC link and 10 A load current, a significant degree of control over the active-switch drain current and switch-node voltage is demonstrated, for both buck and boost mode operation. The current overshoot and ringing in the power waveforms due to circuit parasitics are actively reduced and the voltage oscillations in the DC link are damped. The timing of resistance sequences is shown to be critical to the success of active shaping methods, thus justifying the unparalleled 150 ps resolution of the driver. Under continuous operation and at reduced ratings of 100 V and 2 A load current the significant control of the switch node voltage and voltage spectra is also demonstrated. The switching delay is reduced, and parts of the spectrum are reduced by up to 9 dB, equivalent to the effect of tripling the gate resistance but without any reduction in the overall switching speed.",

keywords = "Active Gate Driver, Arbitrary Gate Impedance, Drain Current Profiling, Dynamic Output Resistance, GaN, Gate Voltage Profiling, HFET, Oscillation Reduction, Programmable Gate Resistance, Switch Node Voltage Profiling, Wide Band-gap",

author = "Dalton, {Jeremy J.O.} and Jianjing Wang and Dymond, {Harry C.P.} and Dawei Liu and Dinesh Pamunuwa and Stark, {Bernard H.} and Neville McNeill and Hollis, {Simon J.}",

year = "2017",

month = aug,

doi = "10.1109/APEC.2017.7930970",

language = "English",

isbn = "9781509053674",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

pages = "1983--1989",

booktitle = "2017 IEEE Applied Power Electronics Conference and Exposition (APEC 2017)",

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note = "32nd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2017 ; Conference date: 26-03-2017 Through 30-03-2017",

}

Dalton, JJO, Wang, J, Dymond, HCP , Liu, D , Pamunuwa, D , Stark, BH, McNeill, N & Hollis, SJ 2017, Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers. in 2017 IEEE Applied Power Electronics Conference and Exposition (APEC 2017): Proceedings of a meeting held 26-30th March 2017, Tampa, FL, USA., 7930970, Institute of Electrical and Electronics Engineers (IEEE), pp. 1983-1989, 32nd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2017, Tampa, United States, 26/03/17. https://doi.org/10.1109/APEC.2017.7930970

Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers. / Dalton, Jeremy J.O.; Wang, Jianjing; Dymond, Harry C.P.; Liu, Dawei ; Pamunuwa, Dinesh ; Stark, Bernard H.; McNeill, Neville; Hollis, Simon J.

2017 IEEE Applied Power Electronics Conference and Exposition (APEC 2017): Proceedings of a meeting held 26-30th March 2017, Tampa, FL, USA. Institute of Electrical and Electronics Engineers (IEEE), 2017. p. 1983-1989 7930970.

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

TY - GEN

T1 - Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers

AU - Dalton, Jeremy J.O.

AU - Wang, Jianjing

AU - Dymond, Harry C.P.

AU - Liu, Dawei

AU - Pamunuwa, Dinesh

AU - Stark, Bernard H.

AU - McNeill, Neville

AU - Hollis, Simon J.

PY - 2017/8

Y1 - 2017/8

N2 - The application of active gate driving to 40 V GaN FETs has previously been shown to reduce ringing and EMI-generating spectral content in the switch-node voltage waveforms. This paper, for the first time, shows active gate driving applied to 650 V GaN FETs, and the shaping of device voltages and currents during switching transients. A custom integrated active gate driver is used, which can dynamically vary its output resistance from 0.12 to 64 Ω, with a 150 ps timing resolution. At 200 V DC link and 10 A load current, a significant degree of control over the active-switch drain current and switch-node voltage is demonstrated, for both buck and boost mode operation. The current overshoot and ringing in the power waveforms due to circuit parasitics are actively reduced and the voltage oscillations in the DC link are damped. The timing of resistance sequences is shown to be critical to the success of active shaping methods, thus justifying the unparalleled 150 ps resolution of the driver. Under continuous operation and at reduced ratings of 100 V and 2 A load current the significant control of the switch node voltage and voltage spectra is also demonstrated. The switching delay is reduced, and parts of the spectrum are reduced by up to 9 dB, equivalent to the effect of tripling the gate resistance but without any reduction in the overall switching speed.

AB - The application of active gate driving to 40 V GaN FETs has previously been shown to reduce ringing and EMI-generating spectral content in the switch-node voltage waveforms. This paper, for the first time, shows active gate driving applied to 650 V GaN FETs, and the shaping of device voltages and currents during switching transients. A custom integrated active gate driver is used, which can dynamically vary its output resistance from 0.12 to 64 Ω, with a 150 ps timing resolution. At 200 V DC link and 10 A load current, a significant degree of control over the active-switch drain current and switch-node voltage is demonstrated, for both buck and boost mode operation. The current overshoot and ringing in the power waveforms due to circuit parasitics are actively reduced and the voltage oscillations in the DC link are damped. The timing of resistance sequences is shown to be critical to the success of active shaping methods, thus justifying the unparalleled 150 ps resolution of the driver. Under continuous operation and at reduced ratings of 100 V and 2 A load current the significant control of the switch node voltage and voltage spectra is also demonstrated. The switching delay is reduced, and parts of the spectrum are reduced by up to 9 dB, equivalent to the effect of tripling the gate resistance but without any reduction in the overall switching speed.

KW - Active Gate Driver

KW - Arbitrary Gate Impedance

KW - Drain Current Profiling

KW - Dynamic Output Resistance

KW - GaN

KW - Gate Voltage Profiling

KW - HFET

KW - Oscillation Reduction

KW - Programmable Gate Resistance

KW - Switch Node Voltage Profiling

KW - Wide Band-gap

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U2 - 10.1109/APEC.2017.7930970

DO - 10.1109/APEC.2017.7930970

M3 - Conference Contribution (Conference Proceeding)

AN - SCOPUS:85019995615

SN - 9781509053674

SP - 1983

EP - 1989

BT - 2017 IEEE Applied Power Electronics Conference and Exposition (APEC 2017)

PB - Institute of Electrical and Electronics Engineers (IEEE)

T2 - 32nd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2017

Y2 - 26 March 2017 through 30 March 2017

ER -

Dalton JJO, Wang J, Dymond HCP , Liu D , Pamunuwa D , Stark BH et al. Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers. In 2017 IEEE Applied Power Electronics Conference and Exposition (APEC 2017): Proceedings of a meeting held 26-30th March 2017, Tampa, FL, USA. Institute of Electrical and Electronics Engineers (IEEE). 2017. p. 1983-1989. 7930970 https://doi.org/10.1109/APEC.2017.7930970

Shaping Switching Waveforms in a 650 V GaN FET Bridge-Leg Using 6.7 GHz Active Gate Drivers

Abstract

Publication series

Conference

Keywords

Access to Document

Pulse quietening at source for higher-frequency power and signal switching

Professor Bernard H Stark

Cite this