Skip the Analysis: Self-Optimising Networks-on-Chip

Simon Hollis, Chris Jackson

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

6 Citations (Scopus)


In this paper, we investigate how the need for static analysis of data flowing
through Networks-on-Chip in many-core and SoC systems may be eliminated, yet still allow
network optimisations to improve runtime behaviour. Our approach is to replace a priori
static analysis with run-time optimisations, taking place in the network itself. To do this, we
introduce our selfoptimising NoC topology: Skip-links, which inserts long-range links into a
standard mesh.
Original languageEnglish
Title of host publicationElectronic System Design (ISED), 2010 International Symposium on
Publication statusPublished - 20 Dec 2010


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