SNDR sensitivity analysis for cascaded ΣΔ modulators

J Morizio, M Hoke, T Kocak, C Geddie

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

358 Downloads (Pure)


Cascade, single and multi-bit, ΣΔ architectures provide stable, high order quantization noise shaping used in high resolution A/D conversion. One major disadvantage of cascaded ΣΔ topologies is the extreme SNDR sensitivity to gain mismatch between the analog modulator and the digital error correction logic. This paper will investigate this SNDR sensitivity phenomenon for a 6th order, 1-bit quantizer and 4th order, 5-bit quantizer cascaded ΣΔ A/D system. Circuit parameters of the switched capacitor integrator such as amplifier open loop gain, integrator gain, and amplifier offsets and layout parasitics are characterized
Translated title of the contributionSNDR sensitivity analysis for cascaded sigma-delta modulators
Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century, Geneva
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages765 - 762
ISBN (Print)0780354826
Publication statusPublished - 28 May 2000
EventInternational Symposium on Circuits and Systems - Geneva, Switzerland
Duration: 1 May 2000 → …


ConferenceInternational Symposium on Circuits and Systems
Period1/05/00 → …

Bibliographical note

Conference Proceedings/Title of Journal: IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century
Conference Organiser: IEEE
Rose publication type: Conference contribution

Terms of use: Copyright © 2000 IEEE. Reprinted from IEEE International Symposium on Circuits and Systems, 2000 (ISCAS 2000). This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Bristol's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to

By choosing to view this document, you agree to all provisions of the copyright laws protecting it.


  • cascade networks
  • integrating circuits
  • network parameters
  • sigma-delta modulation


Dive into the research topics of 'SNDR sensitivity analysis for cascaded ΣΔ modulators'. Together they form a unique fingerprint.

Cite this