Abstract
Memristors are low-power memory-holding resistors thought to be useful for neuromophic computing, which can compute via spike-interactions mediated through the device's short-term memory. Using interacting spikes, it is possible to build an AND gate that computes OR at the same time, similarly a full adder can be built that computes the arithmetical sum of its inputs. Here we show how these gates can be understood by modelling the memristors as a novel type of perceptron: one which is sensitive to input order. The memristor's memory can change the input weights for later inputs, and thus the memristor gates cannot be accurately described by a single perceptron, requiring either a network of time-invarient perceptrons or a complex time-varying self-reprogrammable perceptron. This work demonstrates the high functionality of memristor logic gates, and also that the addition of theasholding could enable the creation of a standard perceptron in hardware, which may have use in building neural net chips.
Original language | Undefined/Unknown |
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Journal | arXiv |
Publication status | Published - 8 Jan 2018 |
Bibliographical note
8 pages, 3 figures. Poster presentation at a conferenceResearch Groups and Themes
- Memory
Keywords
- cs.ET
- cs.AR
- cs.NE
- 68T-06, 94C-06
- B.3.1; B.2.0; B.6.0; I.2.0; I.6.m; C.1.m