STEP: A Unified Design Methodology for Secure Test and IP Core Protection

P. Yeolekar, Rishad A Shafik, Jimson Mathew, Dhiraj K Pradhan, S. P. Mohanty

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

Original languageEnglish
Title of host publicationGreat Lakes Symposium on VLSI (GLSVLSI)
PublisherAssociation for Computing Machinery (ACM)
Publication statusPublished - May 2012

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