Switching Sensitive Driver Circuit to Combat Dynamic Delay in On-Chip Buses

Roshan Weerasekera; Li-Rong Zheng; Dinesh Pamunuwa; Hannu Tenhunen

doi:10.1007/11556930_29

Switching Sensitive Driver Circuit to Combat Dynamic Delay in On-Chip Buses

Roshan Weerasekera, Li-Rong Zheng, Dinesh Pamunuwa, Hannu Tenhunen

Research output: Chapter in Book/Report/Conference proceeding › Other chapter contribution

3 Citations (Scopus)

Original language	Undefined/Unknown
Title of host publication	Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Editors	Vassilis Paliouras, Johan Vounckx, Diederik Verkest
Publisher	Springer Berlin Heidelberg
Pages	277-285
Number of pages	9
Volume	3728
ISBN (Print)	978-3-540-29013-1
DOIs	https://doi.org/10.1007/11556930_29
Publication status	Published - 2005

Publication series

Name	Lecture Notes in Computer Science
Publisher	Springer Berlin Heidelberg

Structured keywords

Photonics and Quantum

Access to Document

10.1007/11556930_29

http://dx.doi.org/10.1007/11556930_29

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Persistent link

Cite this

Weerasekera, R., Zheng, L-R., Pamunuwa, D., & Tenhunen, H. (2005). Switching Sensitive Driver Circuit to Combat Dynamic Delay in On-Chip Buses. In V. Paliouras, J. Vounckx, & D. Verkest (Eds.), Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (Vol. 3728, pp. 277-285). (Lecture Notes in Computer Science). Springer Berlin Heidelberg. https://doi.org/10.1007/11556930_29

Weerasekera, Roshan ; Zheng, Li-Rong ; Pamunuwa, Dinesh et al. / Switching Sensitive Driver Circuit to Combat Dynamic Delay in On-Chip Buses. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. editor / Vassilis Paliouras ; Johan Vounckx ; Diederik Verkest. Vol. 3728 Springer Berlin Heidelberg, 2005. pp. 277-285 (Lecture Notes in Computer Science).

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author = "Roshan Weerasekera and Li-Rong Zheng and Dinesh Pamunuwa and Hannu Tenhunen",

year = "2005",

doi = "10.1007/11556930_29",

language = "Undefined/Unknown",

isbn = "978-3-540-29013-1",

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Weerasekera, R, Zheng, L-R, Pamunuwa, D & Tenhunen, H 2005, Switching Sensitive Driver Circuit to Combat Dynamic Delay in On-Chip Buses. in V Paliouras, J Vounckx & D Verkest (eds), Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. vol. 3728, Lecture Notes in Computer Science, Springer Berlin Heidelberg, pp. 277-285. https://doi.org/10.1007/11556930_29

Switching Sensitive Driver Circuit to Combat Dynamic Delay in On-Chip Buses. / Weerasekera, Roshan; Zheng, Li-Rong; Pamunuwa, Dinesh et al.
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. ed. / Vassilis Paliouras; Johan Vounckx; Diederik Verkest. Vol. 3728 Springer Berlin Heidelberg, 2005. p. 277-285 (Lecture Notes in Computer Science).

Research output: Chapter in Book/Report/Conference proceeding › Other chapter contribution

TY - CHAP

T1 - Switching Sensitive Driver Circuit to Combat Dynamic Delay in On-Chip Buses

AU - Weerasekera, Roshan

AU - Zheng, Li-Rong

AU - Pamunuwa, Dinesh

AU - Tenhunen, Hannu

PY - 2005

Y1 - 2005

U2 - 10.1007/11556930_29

DO - 10.1007/11556930_29

M3 - Other chapter contribution

SN - 978-3-540-29013-1

VL - 3728

T3 - Lecture Notes in Computer Science

SP - 277

EP - 285

BT - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

A2 - Paliouras, Vassilis

A2 - Vounckx, Johan

A2 - Verkest, Diederik

PB - Springer Berlin Heidelberg

ER -

Weerasekera R, Zheng L-R, Pamunuwa D, Tenhunen H. Switching Sensitive Driver Circuit to Combat Dynamic Delay in On-Chip Buses. In Paliouras V, Vounckx J, Verkest D, editors, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. Vol. 3728. Springer Berlin Heidelberg. 2005. p. 277-285. (Lecture Notes in Computer Science). doi: 10.1007/11556930_29