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With the evolution of cloud computing, FPGAs are involved in the data centers thanks to their high performance and logic reconfigurable features. To efficiently make use of data center resources, recent rack scale architecture tends to disaggregate data center resources. This paper proposes the Synchronizing Network wide Function Reconfiguration (SNFR) protocol that aims to synchronize the reconfiguration of coherent functions on disaggregated FPGA resources deployed across the network. The associated protocol processor is implemented. The synchronized reconfiguration is captured by the Xilinx debug core and network traffic analyzer. The experimental section shows that the protocol processor can support maximum 9 Gbps traffic and introduces additional latency ranged from from 0.1 μs to 0.21μs.
|Title of host publication||2017 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2017|
|Publisher||Institute of Electrical and Electronics Engineers (IEEE)|
|Number of pages||6|
|Publication status||Published - 2 Feb 2018|
|Event||2017 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2017 - Cancun, Mexico|
Duration: 4 Dec 2017 → 6 Dec 2017
|Conference||2017 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2017|
|Period||4/12/17 → 6/12/17|
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- 1 Finished
Nunez-Yanez, J. L.
5/01/16 → 4/01/20