Abstract
The XMOS architecture scales from real-time systems with a single multithreaded processor to systems with thousands of processors. Concurrent processing, communications and I/O are supported by the instruction set of the XCore processors and by the message-routing techniques and protocols in the XMOS interconnect. The event-driven architecture supports energy-efficient multicore and multichip systems in which cores are active only when needed.
| Original language | English |
|---|---|
| Number of pages | 11 |
| Journal | IEEE Micro |
| Volume | 32 |
| Issue number | 6 |
| Publication status | Accepted/In press - 2012 |