Thread-parallel MPEG-2 and MPEG-4 encoders for shared-memory system-on-chip multiprocessors

VA Chouliaras, TR Jacobs, JL Nunez-Yanez, K Manolopoulos, K Nakos, D Reisis

Research output: Contribution to journalArticle (Academic Journal)peer-review

1 Citation (Scopus)

Abstract

This work focuses on speeding up MPEG-2 and MPEG-4 encoding by using thread parallelism for shared-memory, System-on-Chip (SoC) multiprocessors. Improving the performance of the MPEG encoders is shown by reducing the dynamic instruction count at multiple processor contexts and then mapping onto a configurable SoC multiprocessor. The resulting reduction in the dynamic instruction count of the parallelized MPEG-2 TM5 encoder for 32 processor contexts reaches a maximum of 95% and that of the MPEG-4 XViD a maximum of 83% for 16 processor contexts, both compared to the sequential encoder. To realize the parallelized encoders we present a configurable, N-way, extensible, bus-based, cache-coherent SoC multiprocessor, augmented with data-parallel coprocessors, and we give the VLSI implementation for the 2-way and 4-way configurations.
Translated title of the contributionThread-parallel MPEG-2 and MPEG-4 encoders for shared-memory system-on-chip multiprocessors
Original languageEnglish
Pages (from-to)353 - 360
Number of pages8
JournalInternational Journal of Computers and Applications
Volume29 (4)
Publication statusPublished - 2007

Bibliographical note

Publisher: Acta Press

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