Topology, Efficiency Analysis and Control of a Four-level π-type Converter

Bosen Jin, Xibo Yuan*

*Corresponding author for this work

Research output: Contribution to journalArticle (Academic Journal)peer-review

9 Citations (Scopus)
293 Downloads (Pure)

Abstract

This paper provides a comprehensive analysis for a four-level pi -type converter for low-voltage applications. This topology is a kind of reduced device-count neutral-point-clamped multilevel converter and formed by only six switches in each phase leg. The line (phase-to-phase) output voltage can have seven levels and the output harmonics are much lower than that of a standard two-level converter. The switching states and their associated output voltage levels have been analyzed. A generalized averaged analytical power loss model of this converter has also been developed to investigate the loss distribution among the power devices as well as the efficiency. The four-level pi -type converter has a higher efficiency when the switching frequency is above 5 kHz compared with two-level and three-level converters with the power devices used in this paper. The reduced output harmonics, hence reduced filtering requirement together with improved efficiency and cooling (heat sink) requirement, offer a higher density alternative to the two-level converter. A simplified level shifted carrier-based modulation method with dynamic optimal zero-sequence signal injection has been employed to modulate the converter and to control dc-link neutral-point voltages. This paper has experimentally validated the predicted four-level pi -type converter efficiency and the neutral-point voltage balancing control with a back-to-back configuration under high modulation indices and unity power factor. The neutral-point voltage balance region has been plotted and experimentally verified.

Original languageEnglish
Article number8489873
Pages (from-to)1044-1059
Number of pages16
JournalIEEE Journal of Emerging and Selected Topics in Power Electronics
Volume7
Issue number2
Early online date11 Oct 2018
DOIs
Publication statusPublished - 1 Jun 2019

Keywords

  • four-level converter
  • low-voltage application
  • Multilevel converter
  • power loss
  • pulsewidth modulation (PWM)
  • voltage balancing control

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