Towards Automating Simulation-Based Design Verification using ILP

Kerstin Eder; Peter Flach; Hsiou-Wen Hsueh; Muggleton Stephen; Otero Ramon; Tamaddoni-Nezhad Alireza

Towards Automating Simulation-Based Design Verification using ILP

Kerstin Eder, Peter Flach, Hsiou-Wen Hsueh, Muggleton Stephen, Otero Ramon, Tamaddoni-Nezhad Alireza

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

Abstract

Increasing the productivity of simulation-based semiconductor design verification is one of the urgent challenges identified in the International Technology Roadmap for Semiconductors. The most difficult aspect is the generation of stimulus for functional coverage closure. This paper introduces a new Coverage-Directed test Generation (CDG) feedback loop which applies Inductive Logic Programming (ILP) to selected tests and coverage data to induce rules that can be used to automatically direct stimulus generation towards outstanding coverage. The case study documented in this paper shows a significant reduction of simulation time when ILP-based CDG is compared to random test generation. This is an exciting and promising new application area for ILP.

Translated title of the contribution	Towards Automating Simulation-Based Design Verification using ILP
Original language	English
Title of host publication	16th International Conference on Inductive Logic Programming
Pages	154-168
Publication status	Published - 2006

Bibliographical note

ISBN: 9783540738466
Publisher: Springer
Name and Venue of Conference: 16th International Conference on Inductive Logic Programming
Other identifier: 2000612

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@inproceedings{c3aea47f1c854a9ca617b91e081099f3,

title = "Towards Automating Simulation-Based Design Verification using ILP",

abstract = "Increasing the productivity of simulation-based semiconductor design verification is one of the urgent challenges identified in the International Technology Roadmap for Semiconductors. The most difficult aspect is the generation of stimulus for functional coverage closure. This paper introduces a new Coverage-Directed test Generation (CDG) feedback loop which applies Inductive Logic Programming (ILP) to selected tests and coverage data to induce rules that can be used to automatically direct stimulus generation towards outstanding coverage. The case study documented in this paper shows a significant reduction of simulation time when ILP-based CDG is compared to random test generation. This is an exciting and promising new application area for ILP. ",

author = "Kerstin Eder and Peter Flach and Hsiou-Wen Hsueh and Muggleton Stephen and Otero Ramon and Tamaddoni-Nezhad Alireza",

note = "ISBN: 9783540738466 Publisher: Springer Name and Venue of Conference: 16th International Conference on Inductive Logic Programming Other identifier: 2000612",

year = "2006",

language = "English",

pages = "154--168",

booktitle = "16th International Conference on Inductive Logic Programming",

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T1 - Towards Automating Simulation-Based Design Verification using ILP

AU - Eder, Kerstin

AU - Flach, Peter

AU - Hsueh, Hsiou-Wen

AU - Stephen, Muggleton

AU - Ramon, Otero

AU - Alireza, Tamaddoni-Nezhad

N1 - ISBN: 9783540738466 Publisher: Springer Name and Venue of Conference: 16th International Conference on Inductive Logic Programming Other identifier: 2000612

PY - 2006

Y1 - 2006

N2 - Increasing the productivity of simulation-based semiconductor design verification is one of the urgent challenges identified in the International Technology Roadmap for Semiconductors. The most difficult aspect is the generation of stimulus for functional coverage closure. This paper introduces a new Coverage-Directed test Generation (CDG) feedback loop which applies Inductive Logic Programming (ILP) to selected tests and coverage data to induce rules that can be used to automatically direct stimulus generation towards outstanding coverage. The case study documented in this paper shows a significant reduction of simulation time when ILP-based CDG is compared to random test generation. This is an exciting and promising new application area for ILP.

AB - Increasing the productivity of simulation-based semiconductor design verification is one of the urgent challenges identified in the International Technology Roadmap for Semiconductors. The most difficult aspect is the generation of stimulus for functional coverage closure. This paper introduces a new Coverage-Directed test Generation (CDG) feedback loop which applies Inductive Logic Programming (ILP) to selected tests and coverage data to induce rules that can be used to automatically direct stimulus generation towards outstanding coverage. The case study documented in this paper shows a significant reduction of simulation time when ILP-based CDG is compared to random test generation. This is an exciting and promising new application area for ILP.

M3 - Conference Contribution (Conference Proceeding)

SP - 154

EP - 168

BT - 16th International Conference on Inductive Logic Programming

ER -

Towards Automating Simulation-Based Design Verification using ILP

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