Towards Automating Simulation-Based Design Verification Using ILP

KI Eder, PA Flach, H-W Hsueh

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

14 Citations (Scopus)


Increasing the productivity of simulation-based semiconductor design verification is one of the urgent challenges identified in the International Technology Roadmap for Semiconductors. The most difficult aspect is the generation of stimulus for functional coverage closure. This paper introduces a new Coverage-Directed test Generation (CDG) feedback loop which applies Inductive Logic Programming (ILP) to selected tests and coverage data to induce rules that can be used to automatically direct stimulus generation towards outstanding coverage. The case study documented in this paper shows a significant reduction of simulation time when ILP-based CDG is compared to random test generation. This is an exciting and promising new application area for ILP.
Translated title of the contributionTowards Automating Simulation-Based Design Verification Using ILP
Original languageEnglish
Title of host publicationInductive Logic Programming, 16th International Conference, ILP 2006, Santiago de Compostela, Spain, August 24-27, 2006
Pages154 - 168
Number of pages15
VolumeLNAI 4455
ISBN (Print)9783540738466
Publication statusPublished - Aug 2007

Bibliographical note

Other: Lecture Notes in Computer Science, vol 4455


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