Tracking Performance Portability on the Yellow Brick Road to Exascale

Tom J Deakin; Andrei Poenaru; Tom Lin; Simon N Mcintosh-Smith

doi:10.1109/P3HPC51967.2020.00006

Tracking Performance Portability on the Yellow Brick Road to Exascale

Tom J Deakin, Andrei Poenaru, Tom Lin, Simon N Mcintosh-Smith

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

9 Citations (Scopus)

145 Downloads (Pure)

Abstract

With Exascale machines on our immediate horizon, there is a pressing need for applications to be made ready to best exploit these systems. However, there will be multiple paths to Exascale, with each system relying on processor and accelerator technologies from different vendors. As such, applications will be required to be portable between these different architectures, but it is also critical that they are efficient too. These double requirements for portability and efficiency begets the need for performance portability. In this study we survey the performance portability of different programming models, including the open standards OpenMP and SYCL, across the diverse landscape of Exascale and pre-Exascale processors from Intel, AMD, NVIDIA, Fujitsu, Marvell, and Amazon, together encompassing GPUs and CPUs based on both x86 and Arm architectures. We also take a historical view and analyse how performance portability has changed over the last year.

Original language	English
Title of host publication	Proceedings of P3HPC 2020
Subtitle of host publication	International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	1-13
Number of pages	13
ISBN (Electronic)	9781665422871
DOIs	https://doi.org/10.1109/P3HPC51967.2020.00006
Publication status	E-pub ahead of print - 1 Jan 2021

Publication series

Name	Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis

Bibliographical note

Publisher Copyright:
© 2020 IEEE.

Access to Document

10.1109/P3HPC51967.2020.00006

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This is the accepted author manuscript (AAM). The final published version (version of record) is available online via IEEE at P3HPC51967.2020.00006. Please refer to any applicable terms of use of the publisher.
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Sadaf R Alam (Manager), Steven A Chapman (Manager), Polly E Eccleston (Other), Simon H Atack (Other) & D A G Williams (Manager)
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Cite this

Deakin, T. J., Poenaru, A., Lin, T., & Mcintosh-Smith, S. N. (2021). Tracking Performance Portability on the Yellow Brick Road to Exascale. In Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis (pp. 1-13). [9309052] (Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis). Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/P3HPC51967.2020.00006

Deakin, Tom J ; Poenaru, Andrei ; Lin, Tom et al. / Tracking Performance Portability on the Yellow Brick Road to Exascale. Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis. Institute of Electrical and Electronics Engineers (IEEE), 2021. pp. 1-13 (Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis).

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abstract = "With Exascale machines on our immediate horizon, there is a pressing need for applications to be made ready to best exploit these systems. However, there will be multiple paths to Exascale, with each system relying on processor and accelerator technologies from different vendors. As such, applications will be required to be portable between these different architectures, but it is also critical that they are efficient too. These double requirements for portability and efficiency begets the need for performance portability. In this study we survey the performance portability of different programming models, including the open standards OpenMP and SYCL, across the diverse landscape of Exascale and pre-Exascale processors from Intel, AMD, NVIDIA, Fujitsu, Marvell, and Amazon, together encompassing GPUs and CPUs based on both x86 and Arm architectures. We also take a historical view and analyse how performance portability has changed over the last year.",

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Deakin, TJ, Poenaru, A, Lin, T & Mcintosh-Smith, SN 2021, Tracking Performance Portability on the Yellow Brick Road to Exascale. in Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis., 9309052, Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis, Institute of Electrical and Electronics Engineers (IEEE), pp. 1-13. https://doi.org/10.1109/P3HPC51967.2020.00006

Tracking Performance Portability on the Yellow Brick Road to Exascale. / Deakin, Tom J; Poenaru, Andrei; Lin, Tom et al.

Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis. Institute of Electrical and Electronics Engineers (IEEE), 2021. p. 1-13 9309052 (Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis).

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

TY - GEN

T1 - Tracking Performance Portability on the Yellow Brick Road to Exascale

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AU - Poenaru, Andrei

AU - Lin, Tom

AU - Mcintosh-Smith, Simon N

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N2 - With Exascale machines on our immediate horizon, there is a pressing need for applications to be made ready to best exploit these systems. However, there will be multiple paths to Exascale, with each system relying on processor and accelerator technologies from different vendors. As such, applications will be required to be portable between these different architectures, but it is also critical that they are efficient too. These double requirements for portability and efficiency begets the need for performance portability. In this study we survey the performance portability of different programming models, including the open standards OpenMP and SYCL, across the diverse landscape of Exascale and pre-Exascale processors from Intel, AMD, NVIDIA, Fujitsu, Marvell, and Amazon, together encompassing GPUs and CPUs based on both x86 and Arm architectures. We also take a historical view and analyse how performance portability has changed over the last year.

AB - With Exascale machines on our immediate horizon, there is a pressing need for applications to be made ready to best exploit these systems. However, there will be multiple paths to Exascale, with each system relying on processor and accelerator technologies from different vendors. As such, applications will be required to be portable between these different architectures, but it is also critical that they are efficient too. These double requirements for portability and efficiency begets the need for performance portability. In this study we survey the performance portability of different programming models, including the open standards OpenMP and SYCL, across the diverse landscape of Exascale and pre-Exascale processors from Intel, AMD, NVIDIA, Fujitsu, Marvell, and Amazon, together encompassing GPUs and CPUs based on both x86 and Arm architectures. We also take a historical view and analyse how performance portability has changed over the last year.

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EP - 13

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PB - Institute of Electrical and Electronics Engineers (IEEE)

ER -

Deakin TJ, Poenaru A, Lin T, Mcintosh-Smith SN. Tracking Performance Portability on the Yellow Brick Road to Exascale. In Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis. Institute of Electrical and Electronics Engineers (IEEE). 2021. p. 1-13. 9309052. (Proceedings of P3HPC 2020: International Workshop on Performance, Portability, and Productivity in HPC, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis). Epub 2021 Jan 1. doi: 10.1109/P3HPC51967.2020.00006

Tracking Performance Portability on the Yellow Brick Road to Exascale

Abstract

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HPC (High Performance Computing) Facility

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