Tracking Performance Portability on the Yellow Brick Road to Exascale

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)


With Exascale machines on our immediate horizon, there is a pressing need for applications to be made ready to best exploit these systems. However, there will be multiple paths to Exascale, with each system relying on processor and accelerator technologies from different vendors. As such, applications will be required to be portable between these different architectures, but it is also critical that they are efficient too. These double requirements for portability and efficiency begets the need for performance portability. In this study we survey the performance portability of different programming models, including the open standards OpenMP and SYCL, across the diverse landscape of Exascale and pre-Exascale processors from Intel, AMD, NVIDIA, Fujitsu, Marvell, and Amazon, together encompassing GPUs and CPUs based on both x86 and Arm architectures. We also take a historical view and analyse how performance portability has changed over the last year.
Original languageEnglish
Title of host publicationProceedings of the Performance Portability and Productivity Workshop P3HPC
Subtitle of host publicationSupercomputing 2020
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Publication statusAccepted/In press - 22 Sep 2020

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