Transfer IV and Threshold Voltage Drift of GaN and SiC Cascode Discrete Devices Under Gate Bias Stress

Yasin Gunaydin*, Saeed Jahdi, Xibo Yuan, Bernard Stark, Jose Ortiz-Gonzalez, Erfan Bashar, Olayiwola Alatise, Phil Mellor

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

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Abstract

Gallium Nitride (GaN) and Silicon Carbide (SiC) power cascode devices take advantage of a low-voltage enhancement-mode Silicon power MOSFET coupled with a high-voltage depletion-mode GaN HEMT or SiC JFET to realize high switching frequencies with the intention of avoiding charge trapping and threshold voltage drift in the gate oxide traps of enhancement-mode SiC MOSFETs. Nevertheless, in this paper it will be shown that SiC and GaN cascodes will also suffer from the gate threshold voltage drift when subject to significant electrothermal stress. This is due to charge trapping and the impact of additional leakage current in the high-voltage device and it can lead to permanent degradations.

Original languageEnglish
Title of host publicationPCIM Europe 2022
Subtitle of host publicationInternational Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
PublisherVDE Verlag
Pages263-268
Number of pages6
ISBN (Print)9783800758227
DOIs
Publication statusPublished - 19 Aug 2022
EventInternational Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, PCIM Europe 2022 - Nuremberg, Germany
Duration: 10 May 202212 May 2022

Publication series

NamePCIM Europe Conference Proceedings
ISSN (Electronic)2191-3358

Conference

ConferenceInternational Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, PCIM Europe 2022
Country/TerritoryGermany
CityNuremberg
Period10/05/2212/05/22

Bibliographical note

Publisher Copyright:
© VDE VERLAG GMBH, Berlin, Offenbach.

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